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SCC Reporting the HARD_BAD Alarm Due to Incorrect Clock Tracing Settings

Publication Date:  2012-07-25 Views:  37 Downloads:  2
Issue Description

During project deployment, the active and standby SCCs of two OptiX OSN 6800 NEs report the HARD_ BAD alarm at the same time.

The OptiX OSN 6800 NEs on which alarms are generated are of the 5.51.04.43 version. Alarm information is as follows:

HARD_BAD  CR  start 2010-07-15 18:25:05  None  SA  NEW_BOARD   board=17;para[0]=0x16,para[1]=0x0,para[2]=0x4;  

HARD_BAD  CR  start 2010-07-14 23:50:07  None  SA  NEW_BOARD   board=18;para[0]=0x16,para[1]=0x0,para[2]=0x4; 
Alarm Information
HARD_BAD.
Handling Process

1.         Query parameters of the HARD_BAD alarm. The query result indicates that the simulated phase-locked loop (PLL) circuit is faulty, which may be caused by the clock.

2.         Query the clock configuration. The query result indicates that the clock source that is traced is the clock at the optical port of the 5-sc2 board.

   :cfg-get-synclass:17                                     

    SYN-CLASS  : 3       0x0005ff01 0x0005ff02 0x0000fff0  

The clock source cannot be traced because the SC2 board is not connected during the project deployment.

3.         Set a local clock as the source to be traced, this alarm is cleared.

    :cfg-set-synclass:17,1,0x0000fff0

The HARD_BAD alarm will be reported if the clock tracing source is incorrectly set for the OptiX OSN 6800.

Root Cause

1.         SCC fault.

2.         SCC configuration problems, which cause incorrect alarms.

Suggestions
N/A

END