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E1000E Chip Process Mechanism Result In interconnection Falilure Between E1000E And S9300

Publication Date:  2012-10-25 Views:  39 Downloads:  0
Issue Description
One S9300(V1R1B125+V1R1SPH019) interconnects with an E1000E by fiber.The port of S9300 aperiodicity blinks for a second.It results in the packets loss.
Alarm Information
Dec 15 2011 20:34:14 HEBAD-CMNET-SW04-S9312 %%01IFNET/4/IF_STATE(l): Interface GigabitEthernet3/0/2 has turned into UP state.
Dec 15 2011 20:34:13 HEBAD-CMNET-SW04-S9312 %%01IFNET/4/IF_STATE(l): Interface GigabitEthernet3/0/2 has turned into DOWN state.
Dec 15 2011 20:22:06 HEBAD-CMNET-SW04-S9312 %%01IFNET/4/IF_STATE(l): Interface GigabitEthernet3/0/2 has turned into UP state.
Dec 15 2011 20:22:05 HEBAD-CMNET-SW04-S9312 %%01IFNET/4/IF_STATE(l): Interface GigabitEthernet3/0/2 has turned into DOWN state.
Handling Process
1. Replacing the fiber between S9300 and E1000 is invalid
2. Replacing the ports of S9300 and E1000 is invalid
3. Replacing the optical module of S9300 and E1000 is invalid
4. Replacing the board of S9300 and E1000 is invalid
5. During the process, the phenomena varies with the traffic volume.It indicates whether the phenomena appears is decided by the port traffic volume and the chip process mechanism.At E1000E,there are a lot of “overruns” counting errors at the port which links with S9300.”Overruns” means the capacity of receiving FIFO is not enough to receive all of the packets.It can be presumed that the paroxysmal packets exceed the port process capacity and cause the “overruns”.Laterly,the R&D confirmed when the traffic volume exceed the chip process capacity,it will exhaust the receiving buffer.At this time,the chip cannot process the following packets in time.To avoid the service interruption for a long time,when the chip detect the receiving buffer “overruns” for 5 times,the chip will report a interruption and reset itself.Then,the chip will negotiate with the peer again.The whole process will last 100-200ms.Because the port of S9300V1R1B125 requires the delay of port down/up sharply,with the sensitivity within 10ms(V1R1 cannot adjust it,while,V1R2 can),it will cause the port of S9300 blinks,which accords with the symptom.The resolution is controlling the traffic volume of port within the limit of chip process capacity.This trouble lies not in the E1000E software version,but in the E1000E 2GE board forwarding performance and process mechanism.
Root Cause
he link between S9300 and E1000E is abnormal
2. The port of S9300 or E1000E is abnormal
3. The optical module of S9300 or E1000E is abnormal
4. The S9300 or E1000E board is abnormal
5. The chip process mechanism of S9300 and E1000E is different
Suggestions
1. It is better to associate with the product engineer or R&D in time if the trouble concerns multiple products.
2. The engineer should master not only traditional troubleshooting methods,but also some other ways.

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