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MA5600T, MA5603T, and MA5608T Hardware Description 25

This manual describes the Huawei MA5600T, MA5603T, and MA5608T hardware specifications, such as dimensions, weight, power consumption, capacity, structure, chassis, slots, boards, power modules, and optical modules.
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H802SHLB Board Description

H802SHLB Board Description

The H802SHLB is a 16-port SHDSL.bis service board. The SHDSL port cooperates with the SHDSL transceiver unit-remote (STU-R) to provide 16 channels of the SHDSL service.

Functional Specifications

Please refer to "SHDSL Service Board Comparison".

Technical Specifications

Please refer to "Power Consumption and Maximum Frame Size of Boards".

Working Principle

Figure 3-142  Working principle of the H802SHLB board

The basic working principle of the H802SHLB board is as follows:

  • The control module loads the board software, controls the running of the board, and manages the entire board.
  • The protection module protects and isolates the board from lightning strikes. The DC block isolates the direct current. The protector protects the high voltage.
  • The forwarding module processes the signals. After being processed by the control module, the signals are transmitted to the backplane bus through the interface of the backplane.
  • The interface module inputs, outputs, and converts the signals.
  • The power module supplies power to each functional module of the board.
  • The clock module provides clock signals for each functional module of the board.
The service process is as follows:
  • In the upstream direction, the interface module transmits subscriber line signals to the forwarding module. The forwarding module reorganizes the cell flow into ATM/PTM packets, encapsulates the ATM/PTM packets into IP packets, and performs CAR on the IP packets. Controlled by the logical switch, the IP packets are transmitted to the backplane bus through the backplane interface.
  • In the downstream direction, the forwarding module decapsulates the IP packets from the backplane bus, performs CAR on the IP packets, reorganizes the IP packets into ATM/PTM packets, and transmits the ATM/PTM packets to the interface module. The interface module converts the ATM/PTM packets into analog signals and transmits the signals to subscriber lines.

Front Panel Port



Indicator

Indicator

Name

Color

Status

Meaning

RUN ALM

Running status indicator

Red

Blinking

The board enters the APP start phase during the board startup

Green

Blinking slowly (on for 1 s and off for 1 s repeatedly)

The board works in the normal state

Green

Blinking quickly (on for 0.25 s and off for 0.25 s repeatedly)

The board enters the phase of communication with the control board during its startup

Red

On

The board is faulty

BSY

Port status indicator

Green

On

At least one service port is activated

-

Off

No service port is activated

Pin Assignments

Table 3-167 describes the pin assignments of the xDSL port on the front panel of the H802SHLB board.

Table 3-167  Pin assignments of the xDSL port

Pin

Signal

 

Pin

Signal

Port

Pin

Signal

 

Pin

Signal

64

15

 

48

7

32

-

 

16

-

63

47

31

15

62

14

46

6

30

-

14

-

61

45

29

13

60

13

44

5

28

-

12

-

59

43

27

11

58

12

42

4

26

-

10

-

57

41

25

9

56

11

40

3

24

-

8

-

55

39

23

7

54

10

38

2

22

-

6

-

53

37

21

5

52

9

36

1

20

-

4

-

51

35

19

3

50

8

34

0

18

-

2

-

49

33

17

1

Daughter Board

The H802SHLB board provides one daughter board port that can hold one daughter board.

Figure 3-143 shows the position of the daughter board on the H802SHLB board.

Figure 3-143  Position of the daughter board on the H802SHLB board

Table 3-168 describes the daughter board supported by the H802SHLB board.

Table 3-168  Daughter board supported by the H802SHLB board

Daughter board

Function

Remarks

H806SHUAB

The functional module of logical processing is integrated on the daughter board to support the protocol process and frame format conversion of the service data stream.

Mandatory

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Updated: 2019-03-18

Document ID: EDOC1000060621

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