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CH225 V3 Compute Node V100R001 User Guide 07

This document describes the appearance, functions, and structure of the CH225 V3 storage expansion compute node (CH225 V3 for short), and methods of installing, removing, and configuring the CH225 V3.
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PCIe Slots

PCIe Slots

This topic describes the mapping between PCIe slots and CPUs, and the PCIe specifications of the CH225 V3.

Table 2-3 describes the mapping between PCIe slots and CPUs, and the PCIe specifications of the CH225 V3.

NOTE:

The PCIe slots mapping to a vacant CPU socket are unavailable.

Table 2-3 PCIe slot description

PCIe Device

Device Name on the BMC

CPU

PCIe Standard

Connector Bandwidth

Bus Width

Port

Device Size

Mezz 1

\

CPU 1

PCIe 3.0

x16 or x8x8

x16 or x8x8

Port 3A (through PCIe Switch)

Non-standard device

Mezz 2

\

CPU 1

PCIe 3.0

x16 or x8x8

x16 or x8x8

Port 3A (through PCIe Switch)

Non-standard device

Mezz 3

\

CPU 2

PCIe 3.0

x16 or x8x8

x16 or x8x8

Port 3A (through PCIe Switch)

Non-standard device

Mezz 4

\

CPU 2

PCIe 3.0

x16 or x8x8

x16 or x8x8

Port 3A (through PCIe Switch)

Non-standard device

PCIe SSD 2

Slot2

CPU 1

PCIe 3.0

x4

x4

Port 1A

2.5-inch disk

PCIe SSD 3

Slot3

CPU 1

PCIe 3.0

x4

x4

Port 2C

2.5-inch disk

PCIe SSD 4

Slot4

CPU 2

PCIe 3.0

x4

x4

Port 1B

2.5-inch disk

PCIe SSD 5

Slot5

CPU 2

PCIe 3.0

x4

x4

Port 2A

2.5-inch disk

PCIe SSD 6

Slot6

CPU 1

PCIe 3.0

x4

x4

Port 1B

2.5-inch disk

PCIe SSD 7

Slot7

CPU 1

PCIe 3.0

x4

x4

Port 2A

2.5-inch disk

PCIe SSD 8

Slot8

CPU 2

PCIe 3.0

x4

x4

Port 1A

2.5-inch disk

PCIe SSD 9

Slot9

CPU 2

PCIe 3.0

x4

x4

Port 2D

2.5-inch disk

PCIe SSD 10

Slot10

CPU 1

PCIe 3.0

x4

x4

Port 2D

2.5-inch disk

PCIe SSD 11

Slot11

CPU 1

PCIe 3.0

x4

x4

Port 2B

2.5-inch disk

PCIe SSD 12

Slot12

CPU 2

PCIe 3.0

x4

x4

Port 2B

2.5-inch disk

PCIe SSD 13

Slot13

CPU 2

PCIe 3.0

x4

x4

Port 2C

2.5-inch disk

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Updated: 2019-07-10

Document ID: EDOC1000095351

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