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The time synchronization condition of the clock board
degrades.
Parameters
None.
Possible Causes
The performance of the traced clock source
degrades or the jitter occurs.
Procedure
Check whether the clock configurations of the upstream
device and downstream device are correct and whether the output mode
of the upstream device is the same as the input mode of the local
device (bit/hz).
Check the frequent offset of the upstream clock source.
The tool may be required.
After the clock source is switched, if the log is generated
on all interfaces of the local device, the local clock board may be
faulty. Then perform an active/standby switchover on the clock boards.
Record this log message and contact technical support personnel.