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Log Reference

S9300, S9300E, and S9300X V200R010C00

This document provides the explanations, causes, and recommended actions of logs on the product.
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CLOCK/4/DCLS_LOS:The BITS[ULONG] DCLS signal is lost.


The BITS input DCLS signal is lost.


Parameter Name Parameter Meaning
[ULONG] Indicates the number of the BITS interface. The values are as follows:

0: BITS0 interface

1: BITS1 interface

Possible Causes

1. The device where the BITS interface resides is faulty.

2. The cable connection between the BITS interface and the local device is abnormal.


  • Check whether the BITS interface is working normally by running the display clock self-test-result command to check whether the status of components including the E1/T1 framer and FPGA is normal.
  • Check whether the link is normal.
  • Check whether the BITS interface sends DCLS signal.
  • Contact technical support personnel.
Updated: 2019-08-21

Document ID: EDOC1000142069

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