No relevant resource is found in the selected language.

This site uses cookies. By continuing to browse the site you are agreeing to our use of cookies. Read our privacy policy>Search

Reminder

To have a better experience, please upgrade your IE browser.

upgrade

Log Reference

S9300, S9300E, and S9300X V200R010C00

This document provides the explanations, causes, and recommended actions of logs on the product.
Rate and give feedback:
Huawei uses machine translation combined with human proofreading to translate this document to different languages in order to help you better understand the content of this document. Note: Even the most advanced machine translation cannot match the quality of professional translators. Huawei shall not bear any responsibility for translation accuracy and it is recommended that you refer to the English document (a link for which has been provided).
CLOCK/4/FR_SW_FAIL

CLOCK/4/FR_SW_FAIL

Message

CLOCK/4/FR_SW_FAIL:The [STRING] clock source of forced switchover fails. (ClockSource=[STRING])

Description

The forcible switchover signal is invalid.

Parameters

Parameter Name Parameter Meaning

[STRING]

Indicates the type of source selection:
  • 1) system: system clock
  • 2) BITS0: BITS0 output
  • 3) BITS1: BITS1 output

[STRING]

Indicates the type of the clock source:
  • 0) Inner Clock: internal clock.
  • 1) BITS0: BITS0 clock.
  • 2) BITS1: BITS1 clock.
  • 3) Peer Board BITS0: BITS0 clock of the peer board.
  • 4) Peer Board BITS1: BITS1 clock of the peer board.
  • 5) Left Frame Clock: clock of the left frame.
  • 6) Right Frame Clock: clock of the right frame.
  • 7) FSU: flexible service unit.
  • 8) Peer Board FSU: flexible service unit of the peer board.
  • 9) System Clock: system clock.
  • 10) Peer System Clock: system clock of the peer board.

Possible Causes

1: The clock source fails.

2: The offset of the clock source is large after the offset detection is enabled.

Procedure

  • Check whether the upstream device works normally.
  • Check whether the link is normal.
  • Check whether the upstream device transmits clock signal.
  • Run the display clock freq-check-range command to view the frequency offset detection range. Check whether the frequency offset of the total received signal is large.
  • Contact technical support personnel.
Translation
Download
Updated: 2019-08-21

Document ID: EDOC1000142069

Views: 539772

Downloads: 37

Average rating:
This Document Applies to these Products
Related Documents
Related Version
Share
Previous Next