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Command Reference

CloudEngine 8800, 7800, 6800, and 5800 V200R002C50

This document describes all the configuration commands of the device, including the command function, syntax, parameters, views, default level, usage guidelines, examples, and related commands.
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Synchronous Ethernet Configuration Commands

Synchronous Ethernet Configuration Commands

NOTE:

The synchronous Ethernet function is supported only by the and CE6880-24S4Q2CQ-EI.

clock alarm-threshold frequency-offset

Function

The clock alarm-threshold frequency-offset command configures the frequency deviation alarm threshold for clock signals.

The undo clock alarm-threshold frequency-offset command restores the default frequency deviation alarm threshold of clock signals.

By default, the frequency deviation alarm threshold of clock signals is 9200 ppb.

Format

clock alarm-threshold frequency-offset frequency-offset-value

undo clock alarm-threshold frequency-offset [ frequency-offset-value ]

Parameters

Parameter Description Value
frequency-offset-value Specifies the frequency deviation alarm threshold. The value is an integer that ranges from 10 to 92, in 100 ppb.

Views

System view

Default Level

2: Configuration level

Usage Guidelines

Usage Scenario

After frequency deviation detection is enabled, a frequency deviation alarm is reported if the clock signal frequency deviation exceeds the threshold.

Prerequisites

Frequency deviation detection has been enabled using the clock freq-deviation-detect enable command in the system view.

Example

# Set the frequency deviation alarm threshold of clock signals to 2000 ppb.

<HUAWEI> system-view
[~HUAWEI] clock alarm-threshold frequency-offset 20

clock clear

Function

The clock clear command restores the default automatic clock source selection mode.

Format

clock clear

Parameters

None

Views

System view

Default Level

2: Configuration level

Usage Guidelines

Usage Scenario

The switch supports three clock source selection modes: automatic, manual, and forcible modes. The default clock source selection mode is the automatic mode.

If you have configured manual or forcible clock source selection, you can run this command to restore the default automatic clock source selection mode.

Configuration Impact

The clock clear command configuration is not saved in the configuration file. After the switch is restarted, the clock clear command configuration is not restored, and the system uses the default automatic clock source selection mode. After the switch is downgraded or upgraded, the previously executed clock clear command no longer takes effect, and the system uses the default automatic clock source selection mode.

Example

# Restore the default automatic clock source selection mode.

<HUAWEI> system-view
[~HUAWEI] clock clear
Related Topics

clock freq-deviation-detect enable

Function

The clock freq-deviation-detect enable command enables frequency deviation detection for clock signals.

The undo clock freq-deviation-detect enable command disables frequency deviation detection for clock signals.

By default, frequency deviation detection is disabled for clock signals.

Format

clock freq-deviation-detect enable

undo clock freq-deviation-detect enable

Parameters

None

Views

System view

Default Level

2: Configuration level

Usage Guidelines

Usage Scenario

If a clock synchronization network has high requirements for the frequency deviation of clock signals, enable frequency deviation detection.

After frequency deviation detection is enabled, the system checks frequency deviation of clock signals. The check results may affect the final result of automatic clock source selection. When the frequency deviation exceeds 9200 ppb, the system considers that the clock source is unreliable and may trigger automatic clock source selection again.

Example

# Enable frequency deviation detection for clock signals.

<HUAWEI> system-view
[~HUAWEI] clock freq-deviation-detect enable

clock link-mode interlink

Function

The clock link-mode interlink command sets the clock link mode of stack member ports to the interlink mode.

The undo clock link-mode interlink command restores the default clock link mode of stack member ports.

By default, the clock link mode of stack member ports is not the interlink mode.

Format

clock link-mode interlink

undo clock link-mode [ interlink ]

Parameters

None

Views

10GE interface view, 40GE interface view, 100GE interface view

Default Level

2: Configuration level

Usage Guidelines

Usage Scenario

To ensure clock or time synchronization between member switches in a stack, you must set the clock link mode of stack member ports to the interlink mode.

Prerequisites

In a stack, the stack-port command has been executed in the interface view or the port member-group command has been executed in the stack port view to add stack member ports to a logical stack port.

Configuration Impact

After the clock link mode of an interface is set to the interlink mode, clock source selection and other clock configuration commands cannot be executed on this interface.

Precautions

This command can be used only in a stack and each chassis can have no more than two stack member ports configured as interlink ports. Clock source selection and other clock configuration commands cannot be configured on interlink ports.

Example

# Set the clock link mode of stack member ports to the interlink mode.

<HUAWEI> system-view
[~HUAWEI] interface stack-port 1/1
[*HUAWEI-Stack-Port1/1] quit
[*HUAWEI] interface 10ge 1/0/1
[*HUAWEI-10GE1/0/1] stack-port 1/1
[*HUAWEI-10GE1/0/1] clock link-mode interlink

clock map unk

Function

The clock map unk command maps an SSM quality level to the clock source with the SSM quality level Unknown (UNK). UNK indicates that the clock source has an unknown SSM quality level.

By default, no SSM quality level is mapped to a clock source with the SSM quality level UNK.

Format

clock map unk { dnu | prc | sec | ssua | ssub }

Parameters

Parameter Description Value
dnu Indicates that the SSM quality level is not used for clock synchronization. -
prc Indicates that the SSM quality level is Primary Reference Clock (PRC) (G.811 clock signal). -
sec Indicates that the SSM quality level is SDH Equipment Clock (SEC). -
ssua Indicates that the SSM quality level is Transit Node Clock (SSU-A) (G.812 transit node clock signal). -
ssub Indicates that the SSM quality level is Local Node Clock (SSU-B) (G.812 local node clock signal). -

Views

System view

Default Level

2: Configuration level

Usage Guidelines

Usage Scenario

By default, the SSM quality level Do Not Use (DNU) is mapped to the clock source with the SSM quality level UNK. If SSM quality levels are used for clock source selection, the clock source with the SSM quality level UNK cannot participate in clock source selection.

If the SSM quality level of an upstream clock source is UNK, but you want the switch to trace this upstream clock source, run the clock map unk command to map an SSM quality level higher than DNU to this upstream clock source.
NOTE:
Priorities of SSM quality levels: prc > ssua > ssub > sec > dnu.

Example

# Map the SSM quality level SSU-A to the clock source with the SSM quality level UNK.

<HUAWEI> system-view
[~HUAWEI] clock map unk ssua

clock max-out-ssm

Function

The clock max-out-ssm command configures the maximum SSM quality level for output clock signals.

The undo clock max-out-ssm command deletes the maximum SSM quality level of output clock signals.

By default, no maximum SSM quality level is configured for output clock signals. That is, the actual SSM quality level of the traced clock source is used.

Format

clock max-out-ssm { prc | sec | ssua | ssub }

undo clock max-out-ssm

Parameters

Parameter Description Value
prc Indicates that the SSM quality level is PRC (G.811 clock signal). -
sec Indicates that the SSM quality level is SEC (SDH clock signal). -
ssua Indicates that the SSM quality level is SSU-A (G.812 transit node clock signal). -
ssub Indicates that the SSM quality level is SSU-B (G.812 local node clock signal). -

Views

System view

Default Level

2: Configuration level

Usage Guidelines

Usage Scenario

If the switch transmits poor-quality clock signals to a downstream device, run the clock max-out-ssm command to configure a low maximum SSM quality level for output clock signals. If SSM quality levels are configured for clock source selection on this downstream device, there is a low probability that this downstream device traces this clock source.

If the SSM quality level of output clock signals is higher than the configured maximum SSM quality level, the switch automatically adjusts the SSM quality level of output clock signals to the configured one. If the SSM quality level of clock signals is lower than the configured one, the switch uses the actual SSM quality level.

Example

# Set the maximum SSM quality level of output clock signals to SSU-A.

<HUAWEI> system-view
[~HUAWEI] clock max-out-ssm ssua

clock priority

Function

The clock priority command configures a priority for a line clock source.

The undo clock priority command deletes the priority for a line clock source.

By default, a line clock source does not have a priority.

Format

clock priority priority-value

undo clock priority

Parameters

Parameter Description Value
priority priority-value Specifies the priority of a line clock source. The value is an integer that ranges from 1 to 255. A smaller value indicates a higher priority.

Views

10GE interface view, 40GE interface view, 100GE interface view

Default Level

2: Configuration level

Usage Guidelines

Usage Scenario

The default priority of a line clock source is 0. That is, this line clock source cannot participate in clock source selection. To enable this line clock source to participate in clock source selection, configure a priority for this line clock source.

Precautions

If SSM quality levels are not used for clock source selection, the switch selects a clock source based on priorities of clock sources.

If SSM quality levels are used for clock source selection, the switch preferentially selects a clock source based on SSM quality levels. If multiple clock sources have the same highest SSM quality level, the switch selects a clock source based on the priorities of these clock sources.

Example

# Set the priority of the line clock source to 10 on 10GE1/0/1.

<HUAWEI> system-view
[~HUAWEI] interface 10ge 1/0/1
[~HUAWEI-10GE1/0/1] clock priority 10

clock source priority

Function

The clock source priority command configures a priority for a PTP clock source.

The undo clock source priority command deletes the configured priority of a PTP clock source.

By default, a clock source does not have a priority.

Format

clock source ptp priority priority-value

undo clock source ptp priority

Parameters

Parameter Description Value
ptp Specifies a PTP clock source. -
priority priority-value Specifies the priority of a clock source. The value is an integer that ranges from 1 to 255. A smaller value indicates a higher priority.

Views

System view

Default Level

2: Configuration level

Usage Guidelines

Usage Scenario

By default, a clock source does not have a priority. That is, this clock source cannot participate in clock source selection. To enable this clock source to participate in clock source selection, configure a priority for this clock source.

Precautions

If SSM quality levels are not used for clock source selection, the switch selects a clock source based on priorities of clock sources.

If SSM quality levels are used for clock source selection, the switch preferentially selects a clock source based on SSM quality levels. If multiple clock sources have the same highest SSM quality level, the switch selects a clock source based on the priorities of these clock sources.

Example

# Set the priority of a PTP clock source to 15.
<HUAWEI> system-view
[~HUAWEI] clock source ptp priority 15 

clock run-mode

Function

The clock run-mode command sets the clock working mode to the free, hold, or normal mode.

By default, the system clock works in normal mode.

Format

clock run-mode { free | hold | normal }

Parameters

Parameter Description Value
free Indicates the free mode. -
hold Indicates the hold mode. -
normal Indicates the normal mode. -

Views

System view

Default Level

2: Configuration level

Usage Guidelines

Usage Scenario

You can run this command to configure a clock working mode for the switch.
  • If you configure free, the system clock works in free mode. In this mode, the switch does not use the clock source selection algorithm to select a clock source.
  • If you configure hold, the system clock works in hold mode. In this mode, the switch uses the locked clock signals.
  • If you configure normal, the switch uses the clock source selection algorithm to select a clock source. If no clock source is available, the system clock automatically works in free or hold mode.

Precautions

  • This command is not supported in a stack scenario.
  • When setting the clock working mode to hold, ensure that the system clock is in lock or hold state.

Example

# Set the clock working mode to hold.

<HUAWEI> system-view
[~HUAWEI] clock run-mode hold

clock source

Function

The clock source command configures the clock source selection mode to the manual or forcible mode and specifies a clock source to be traced.

The default clock source selection mode is the automatic mode.

Format

clock { manual | force } source interface interface-type interface-number

clock { manual | force } source ptp

Parameters

Parameter Description Value
manual Indicates manual clock source selection. -
force Indicates forcible clock source selection. -
ptp Specifies a PTP clock source as the master clock source. -
interface interface-type interface-number Specifies an interface clock source as the master clock source. -

Views

System view

Default Level

2: Configuration level

Usage Guidelines

Usage Scenario

By default, the system uses the automatic clock source selection algorithm to determine the clock source to trace. You can also manually or forcibly specify the clock source to be traced based on the clock source quality.

Configuration Impact

The clock manual source command configuration is not saved in the configuration file. To view the configuration results, run the display clock config command. If the reference clock source becomes invalid, the clock source selection mode is automatically switched to the automatic mode. After the switch is restarted, the clock manual source command configuration is not restored, and the default automatic mode takes effect. After the switch is upgraded, the configured clock manual source command does not take effect, and the default automatic mode takes effect.

Precautions

  • When forcibly specifying a clock source, ensure that clock synchronization has been enabled for the specified clock source. Otherwise, the clock force source command does not take effect.
  • The system clock enters the lock state only when the forcibly specified clock source is in normal state and its SSM quality level is not DNU. Otherwise, the system clock enters the hold state.
  • The manually specified clock source takes effect only when it is in normal or holdoff state and has the highest SSM quality level.

Example

# Configure manual clock source selection and specify a PTP clock source to be traced.
<HUAWEI> system-view
[~HUAWEI] clock manual source ptp

clock source ssm

Function

The clock source ssm command configures an SSM quality level for a PTP clock source.

The undo clock source ssm command deletes the SSM quality level of a PTP clock source.

By default, no SSM quality level is configured for a PTP clock source.

Format

clock source ptp ssm { dnu | prc | sec | ssua | ssub | unk }

undo clock source ptp ssm

Parameters

Parameter Description Value
ptp Specifies an external PTP clock source. -
prc Indicates that the SSM quality level is PRC (G.811 clock signal). -
sec Indicates that the SSM quality level is SEC (SDH clock signal). -
ssua Indicates that the SSM quality level is SSU-A (G.812 transit node clock signal). -
ssub Indicates that the SSM quality level is SSU-B (G.812 local node clock signal). -
unk Indicates that the SSM quality level is unknown clock synchronization quality. -
dnu Indicates that the SSM quality level is not used for clock synchronization. -

Views

System view

Default Level

2: Configuration level

Usage Guidelines

Usage Scenario

A synchronization status message (SSM) transmits the quality level of timing signals on a synchronous timing link. Node clocks on a synchronization network parse the SSM to obtain the quality level of an upstream clock.

If SSM quality levels are used for clock source selection, the switch selects a clock source to trace based on SSM quality levels of clock sources. To enable PTP clock sources to participate in clock source selection, configure SSM quality levels for these clock sources.

NOTE:
Priorities of SSM quality levels: prc > ssua > ssub > sec > unk > dnu

Example

# Set the SSM quality level to prc for the PTP clock source.
<HUAWEI> system-view
[~HUAWEI] clock source ptp ssm prc

clock source-lost holdoff-time

Function

The clock source-lost holdoff-time command configures the hold time of a clock source after its signals become invalid.

By default, the hold time of a clock source after its signals become invalid is 1000 ms.

Format

clock source-lost holdoff-time value

Parameters

Parameter Description Value
value Specifies the hold time of a clock source after its signals become invalid. The value is an integer that ranges from 300 to 1800, in milliseconds. The default value is 1000.

Views

System view

Default Level

2: Configuration level

Usage Guidelines

Usage Scenario

After the signals of a clock source become invalid, the system reports the status change and uses the clock source selection algorithm to select a clock source again only after the specified hold time is up. This prevents frequent clock source selection when clock signals become invalid temporarily.

You can set the hold time based on clock source stability on the clock synchronization network.
  • To fast trace another clock source when the current clock source becomes invalid, set a shorter hold time for the current clock source.
  • To prevent frequent clock source selection when the current clock source becomes invalid temporarily, set a longer hold time for the current clock source.

Example

# Set the hold time of a clock source after its signals become invalid to 500 ms.

<HUAWEI> system-view
[~HUAWEI] clock source-lost holdoff-time 500

clock ssm

Function

The clock ssm command configures an SSM quality level for a line clock source.

The undo clock ssm command deletes the SSM quality level of a line clock source.

By default, the SSM quality level of a line clock source is sent from the remote device.

Format

clock ssm { dnu | prc | sec | ssua | ssub | unk }

undo clock ssm

Parameters

Parameter Description Value
dnu Indicates that the SSM quality level is not used for clock synchronization. -
prc Indicates that the SSM quality level is PRC (G.811 clock signal). -
sec Indicates that the SSM quality level is SEC. -
ssua Indicates that the SSM quality level is SSU-A (G.812 transit node clock signal). -
ssub Indicates that the SSM quality level is SSU-B (G.812 local node clock signal). -
unk Indicates that the SSM quality level is unknown clock synchronization quality. -

Views

10GE interface view, 40GE interface view, 100GE interface view

Default Level

2: Configuration level

Usage Guidelines

Usage Scenario

A synchronization status message (SSM) transmits the quality level of timing signals on a synchronous timing link. Node clocks on a synchronization network parse the SSM to obtain the quality level of an upstream clock.

If SSM quality levels are used for clock source selection, the switch selects a clock source to trace based on SSM quality levels of clock sources. By default, the SSM quality level of a line clock source is sent from an upstream device. You can also manually configure an SSM quality level for a line clock source.

Example

# Set an SSM quality level prc for the line clock source on 10GE1/0/1.

<HUAWEI> system-view
[~HUAWEI] interface 10ge 1/0/1 
[~HUAWEI-10GE1/0/1] clock ssm prc

clock ssm-control

Function

The clock ssm-control command determines whether SSM quality levels are used for clock source selection.

By default, SSM quality levels are not used for clock source selection.

Format

clock ssm-control { on | off }

Parameters

Parameter Description Value
on Indicates that SSM quality levels are used for clock source selection. -
off Indicates that SSM quality levels are not used for clock source selection. -

Views

System view

Default Level

2: Configuration level

Usage Guidelines

Usage Scenario

SSM quality levels indicate quality levels of clock signals. After you configure a switch to use SSM quality levels for clock source selection, the switch preferentially selects a high-quality clock source.

By default, when the switch works in automatic clock source selection mode, it selects a clock source based on priorities of clock sources. If SSM quality levels are used for clock source selection, the switch preferentially selects a clock source based on SSM quality levels. If multiple clock sources have the same highest SSM quality level, the switch selects a clock source based on priorities of these clock sources.

Example

# Use SSM quality levels for clock source selection.

<HUAWEI> system-view
[~HUAWEI] clock ssm-control on

clock switch

Function

The clock switch command configures the recovery mode for the clock source selection algorithm.

By default, the recovery mode of the clock source selection algorithm is the revertive mode.

Format

clock switch { revertive | non-revertive }

Parameters

Parameter Description Value
revertive Indicates the revertive mode. -
non-revertive Indicates the non-revertive mode. -

Views

System view

Default Level

2: Configuration level

Usage Guidelines

Usage Scenario

The clock source selection algorithm supports two recovery modes: revertive mode and non-revertive mode:
  • Revertive mode: If the optimal clock source is faulty, the system uses the clock source selection algorithm to select the sub-optimal clock source. If the optimal clock source recovers, the system automatically traces it again.
  • Non-revertive mode: If the optimal clock source is faulty, the system uses the clock source selection algorithm to select the sub-optimal clock source. If the optimal clock source recovers:
    • If SSM quality levels are not used for automatic clock source selection, the system still traces the sub-optimal clock source.
    • If SSM quality levels are used for automatic clock source selection and the optimal clock source has the same SSM quality level as the sub-optimal clock source, the system still traces the sub-optimal clock source.
    • If SSM quality levels are used for automatic clock source selection and the optimal clock source has a higher SSM quality level than the sub-optimal clock source, the system traces the optimal clock source again.

If the optimal clock source is unstable, the non-revertive mode is recommended, because this mode effectively reduces changes on the master clock source and ensures stable quality of the traced clock source.

Example

# Configure the revertive mode.

<HUAWEI> system-view
[~HUAWEI] clock switch revertive 

clock synchronization enable

Function

The clock synchronization enable command enables clock synchronization for a line clock source.

The undo clock synchronization enable command disables clock synchronization for a line clock source.

By default, clock synchronization is disabled for a line clock source.

Format

clock synchronization enable

undo clock synchronization enable

Parameters

None

Views

10GE interface view, 40GE interface view, 100GE interface view

Default Level

2: Configuration level

Usage Guidelines

Usage Scenario

To enable a line clock source to participate in clock source selection, enable clock synchronization for this line clock source.

Example

# Enable clock synchronization for a line clock source.

<HUAWEI> system-view
[~HUAWEI]interface 10ge 1/0/1
[~HUAWEI-10GE1/0/1]clock synchronization enable

clock source synchronization enable

Function

The clock source synchronization enable command enables clock synchronization for a PTP clock source.

The undo clock source synchronization enable command disables clock synchronization for a PTP clock source.

By default, clock synchronization is disabled for a PTP clock source.

Format

clock source ptp synchronization enable

undo clock source ptp synchronization enable

Parameters

Parameter Description Value
ptp Specifies a PTP clock source. -

Views

System view

Default Level

2: Configuration level

Usage Guidelines

Usage Scenario

To enable a PTP clock source to participate in clock source selection, enable clock synchronization for this PTP clock source.

Example

# Enable clock synchronization for a PTP clock source.
<HUAWEI> system-view
[~HUAWEI] clock source ptp synchronization enable

clock wtr

Function

The clock wtr command sets the wait-to-restore (WTR) time for a clock source.

By default, the WTR time of a clock source is 5 minutes.

Format

clock wtr wtr-time

Parameters

Parameter Description Value
wtr wtr-time Specifies the WTR time for a clock source. The value ranges from 0 to 12, in minutes. The default WTR time is 5 minutes.

Views

System view

Default Level

2: Configuration level

Usage Guidelines

Usage Scenario

When the system detects that a clock source returns to the normal state, the clock source status is updated only after the configured WTR time is Up. Configuring a proper WTR time for a clock source can efficiently reduce the impact of frequent clock source status changes on clock source selection.

Example

# Set the WTR time of a clock source to 6 minutes.

<HUAWEI> system-view
[~HUAWEI] clock wtr 6 

display clock

Function

The display clock command displays clock synchronization configurations and clock source information.

Format

display clock config

display clock source [ ptp | [ interface interface-type interface-number ] ]

Parameters

Parameter Description Value
config Displays clock synchronization configurations. -
source Displays attributes of all clock sources. -
ptp Displays information about a PTP clock source. -
interface interface-type interface-number Displays information about a line clock source. -

Views

All views

Default Level

1: Monitoring level

Usage Guidelines

Usage Scenario

After you complete clock synchronization configurations on the switch, you can run the display clock config command to view the configuration results.

During routine maintenance, you can run the display clock source command to view information about all clock sources, including the traced clock source.

Example

# Display information about all clock sources, including the traced clock source.

<HUAWEI> display clock source
  System trace source State:   freerun mode                                     
                               out of pull-in range                             
  Current system trace source: empty                                            
  Frequency lock success:      no                                               
                                                                                
  Master board                                                                  
  Source        Pri(sys)   In-SSM   Out-SSM   State          Ref-Source         
  ------------------------------------------------------------------------------
  10GE1/0/3     4          sec      dnu       normal         yes                
  10GE1/0/5     10         dnu      dnu       normal         yes                
  ptp           ---        prc      --        normal         no                  
Table 5-59  Description of the display clock source command output

Item

Description

System trace source State

System clock status:

  • lock mode: The system clock works in lock state.
  • free mode: The system clock works in free state.
  • hold mode: The system clock works in hold state.
  • into pull-in range: The system clock is within the frequency deviation range.
  • out of pull-in range: The system clock is out of the frequency deviation range.

Current system trace source

Clock source traced by the system clock.

Frequency lock success

Whether frequency locking succeeds:

  • yes: Frequency locking succeeds.
  • no: Frequency locking fails.

Master board

Master clock card.

Source

Name of a clock source.

Pri(sys)

Priority of a clock source.

In-SSM

SSM quality level received by clock signals or configured SSM quality level.

Out-SSM

SSM quality level of output clock signals.

State

Status of a clock source.

  • normal: The clock source works in normal state.
  • abnormal: The clock source works in abnormal state.
  • holdoff: The clock source works in holdoff state.
  • wtr: The clock source works in WTR state.

Ref-Source

Whether this clock source participates in clock source selection.

  • Yes: This clock source participates in clock source selection.
  • No: This clock source does not participate in clock source selection.

# Display clock synchronization configurations.

<HUAWEI> display clock config
 ethernet synchronization   :enable
 clock freq deviation detect:enable                                                                                                
 clock unk map              :dnu                                                                                                   
 system pll run mode        :normal                                                                                                
 source input threshold     :sec                                                                                                   
                                                                                                                                    
 switch config                                                                                                                     
    sys pll                 :auto mode                                                                                              
    SSM control             :off                                                                                                    
    Extend SSM control      :off                                                                                                    
    internal clockid        :0                                                                                                      
    switch mode             :revertive                                                                                              
    wtr                     :0min                                                                                                   
    holdoff time            :1000ms                                                                                                 
                                                                                                                                    
 source config                                                                                                                     
 10GE1/0/1                                                                                                             
    Sync disable                                                                                                                    
    Pri(sys)      :1
    SSM           :sec                                                                                                
 10GE1/0/2                                                                                                             
    Sync disable                                                                                                                    
    Pri(sys)      :1
    SSM           :sec                                                                                 
 10GE1/0/3                                                                                                             
    Sync enable                                                                                                                     
    Pri(sys)      :1
    SSM           :sec                                                                                       
 10GE1/0/4                                                                                                            
    Sync disable                                                                                                                    
    Pri(sys)      :1
    SSM           :sec                                                                                        
 10GE1/0/5                                                                                                            
    Sync disable                                                                                                                    
    Pri(sys)      :1
    SSM           :sec   
 ptp                                                                                                                               
    Sync enable                                                                                                                     
    SSM           :prc 
Table 5-60  Description of the display clock config command output

Item

Description

ethernet synchronization

Whether synchronous Ethernet is enabled:

  • enable: Synchronous Ethernet is enabled.
  • disable: Synchronous Ethernet is disabled.

clock freq deviation detect

Whether frequency deviation detection is enabled for clock signals:

  • enable: Frequency deviation detection is enabled for clock signals.
  • disable: Frequency deviation detection is disabled for clock signals.

clock unk map

Mapped SSM quality level of the clock source with an SSM quality level of UNK.

system pll run mode

Status of the system PLL.

source input threshold

Input SSM threshold of the clock source:
  • prc
  • ssua
  • ssub
  • sec
  • dnu

switch config

Clock source selection configuration.

sys pll

System PLL.

SSM control

Whether SSM quality levels are used for clock source selection:

  • on: SSM quality levels are used for clock source selection.
  • off: SSM quality levels are not used for clock source selection.

Extend SSM control

Whether extended SSM function is enabled:

  • on: Extended SSM function is enabled.
  • off: Extended SSM function is disabled.

internal clockid

Clock ID of an internal clock source.

switch mode

Clock recovery mode:

  • revertive: revertive mode
  • non-revertive: non-revertive mode

wtr

WTR time for a status change after a clock source recovers.

holdoff time

Hold time after clock source signals become invalid.

source config

Clock source configuration.

Pri(sys)

Priority of a clock source.

SSM

SSM quality level of a clock source.

display clock cluster

Function

The display clock cluster command displays the clock source and locking status of each chassis in a cluster.

Format

display clock cluster { frequency | time } source

Parameters

Parameter Description Value
frequency Displays the frequency synchronization status. -
time Displays the time synchronization status. -
source Indicates a clock source. -

Views

All views

Default Level

1: Monitoring level

Usage Guidelines

To view the clock source and locking status of each chassis in a cluster, run the display clock cluster command.

Example

# Display the frequency synchronization status of each chassis in a cluster.

<HUAWEI> display clock cluster frequency source
Chassis                                                                                                                             
  Chassis   Trace-state   Pull-in   Trace-source                 Lock                                                               
--------------------------------------------------------------------------                                                          
  1         lock          --        --                           yes                                                                
  2         lock          into      10GE2/7/0/4                  yes                                                                
                                                                                                                                    
Port                                                                                                                                
  Source                       Peer Port                    State                                                                   
----------------------------------------------------------------------                                                              
  10GE1/16/0/0                 --                           abnormal                                                                
  10GE2/6/0/0                  --                           abnormal                                                                
  10GE1/16/0/3                 10GE2/7/0/4                  normal                                                                  
  10GE2/7/0/4                  10GE1/16/0/3                 normal 
Table 5-61  Description of the display clock cluster command output

Item

Description

Chassis

Stack ID of the switch.

Trace-state

Status of the current system PLL.

Pull-in

Clock signal direction.

Trace-source

Clock source traced by the current system PLL.

Lock

Lock state.

Source

Source port.

Peer Port

Peer port.

State

Clock source status.

display clock source freq-deviation

Function

The display clock source freq-deviation command displays the frequency deviation values of clock sources.

Format

display clock source freq-deviation

Parameters

None

Views

User view

Default Level

1: Monitoring level

Usage Guidelines

You can run the display clock source freq-deviation command to view the frequency deviation values of clock sources. If the frequency deviation absolute value of a clock source is larger than or equal to 9.2, the frequency deviation detection status is abnormal. If the frequency deviation absolute value is less than 9.2, the frequency deviation detection status is normal.

You can view the frequency deviation values of clock sources only after you enable synchronous Ethernet and frequency deviation detection.

Example

# Display the frequency deviation values of clock sources.

<HUAWEI> display clock source freq-deviation
  Frequency deviation detect:     enable                                       
  Source                               Freq-deviation-value 
  ----------------------------------------------------------
  * 10GE1/0/1                         0.31ppm(normal)
    10GE1/0/2                          ---
Table 5-62  Description of the display clock source freq-deviation command output

Item

Description

Frequency deviation detect

Whether clock frequency deviation detection is enabled.
  • enable: Clock frequency deviation detection is enabled.
  • disable: Clock frequency deviation detection is disabled.

Source

Interface clock source.

If this field displays *, the clock source is traced by the device.

Freq-deviation-value

Frequency deviation value. The format is Symbol (only negative signs are displayed)+Frequency deviation value+Unit (ppm)+Frequency deviation detection status (abnormal or normal).

If this field displays ---, the frequency deviation value of the clock source cannot be detected.

Translation
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Updated: 2019-03-21

Document ID: EDOC1000166501

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