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Advanced O&M Command Reference

OceanStor 18000 and 18000F V5 Series V500R007

This document is applicable to OceanStor 18500 V5, 18800 V5, 18500F V5, and 18800F V5. Based on the CLI, this document describes how to use various commands classified by functionsand how to set the CLI and manage the storage system through these commands.

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Huawei uses machine translation combined with human proofreading to translate this document to different languages in order to help you better understand the content of this document. Note: Even the most advanced machine translation cannot match the quality of professional translators. Huawei shall not bear any responsibility for translation accuracy and it is recommended that you refer to the English document (a link for which has been provided).
cliget -d sensorinformation

cliget -d sensorinformation

Function

The cliget -d sensorinformation command is used to query information about sensors, such as temperature and voltage.

Format

cliget -d sensorinformation num

Parameters

Parameter

Description

Value

num Checks the read counts/status/type of a sensor or the sensor alarm threshold.

The value can be "1" or "2", where:

  • "1": checks the read counts/status/type of a sensor.
  • "2": checks the sensor alarm threshold.

Modes

serial port mode

Usage Guidelines

OceanStor 18500 V5 Kunpeng, 18500F V5 Kunpeng, 18800 V5 Kunpeng and 18800F V5 Kunpeng storage systems support this command.

Example

  • Check the read counts of sensors. The command output varies depending on a specific product.

    iBMC:/->cliget -d sensorinformation 1
     
    Sensorname           | Number     | Diviceid   | Type       | SubType    | LogicType  | FruId      | SensorVal  | AssertState | AssertMask | DeAssertMask
    Clock5310Temp        | 1          | 0          | 1          | 254        | 2          | 0          | 410        | 0           | 7000       | 7000      
    MosATemp             | 2          | 1          | 1          | 13         | 2          | 0          | 510        | 0           | 7a00       | 7000      
    MosBTemp             | 3          | 2          | 1          | 13         | 2          | 0          | 440        | 0           | 7a00       | 7000      
    BoardWindInTempA     | 4          | 3          | 1          | 2          | 2          | 0          | 350        | 0           | 7281       | 7281      
    IOCHi1822Temp        | 5          | 4          | 1          | 12         | 2          | 0          | 480        | 0           | 7080       | 7080      
    CPUTemp              | 6          | 5          | 1          | 6          | 2          | 0          | 870        | 0           | 7280       | 7280      
    DimmTemp             | 7          | 6          | 1          | 1          | 2          | 0          | 610        | 0           | 7080       | 7080      
    EarTemp              | 8          | 0          | 1          | 4          | 32768      | 0          | 310        | 0           | 7281       | 7281      
    Power0Temp           | 9          | 0          | 1          | 254        | 16         | 0          | 420        | 0           | 7000       | 7000      
    Power1Temp           | 10         | 0          | 1          | 254        | 16         | 1          | 400        | 0           | 7000       | 7000      
    Power2Temp           | 11         | 0          | 1          | 254        | 16         | 2          | 440        | 0           | 7000       | 7000      
    Power3Temp           | 12         | 0          | 1          | 254        | 16         | 3          | 460        | 0           | 7000       | 7000      
    SMMTemp              | 13         | 0          | 1          | 0          | 4          | 0          | 550        | 0           | 7080       | 7080      
    BBUTemp              | 14         | 0          | 1          | 5          | 32         | 0          | 0          | 0           | 7080       | 7080      
    MOS0_12V0            | 15         | 0          | 2          | 1          | 2          | 0          | 1208       | 0           | 7081       | 7081      
    VRD_POWER_5V0        | 16         | 1          | 2          | 1          | 2          | 0          | 498        | 0           | 7081       | 7081      
    BP_POWER_3V6         | 17         | 2          | 2          | 1          | 2          | 0          | 358        | 0           | 7081       | 7081      
    SysDiskA_3V3         | 18         | 3          | 2          | 1          | 2          | 0          | 325        | 0           | 7081       | 7081      
    SysDiskB_3V3         | 19         | 4          | 2          | 1          | 2          | 0          | 325        | 0           | 7081       | 7081      
    RTCBAT_3V0           | 20         | 5          | 2          | 2          | 2          | 0          | 313        | 0           | 7081       | 7081      
    AUX_POWER_3V6        | 21         | 6          | 2          | 1          | 2          | 0          | 356        | 0           | 7081       | 7081      
    CPU0_DDR_0V8         | 22         | 7          | 2          | 1          | 2          | 0          | 80         | 0           | 7081       | 7081      
    CPU0_HVCC_1V2        | 23         | 8          | 2          | 1          | 2          | 0          | 121        | 0           | 7081       | 7081      
    CPU0_VDDQAB_1V2      | 24         | 9          | 2          | 1          | 2          | 0          | 119        | 0           | 7081       | 7081      
    CPU0_VDDQCD_1V2      | 25         | 10         | 2          | 1          | 2          | 0          | 119        | 0           | 7081       | 7081      
    CPU0_AVS_0V9         | 26         | 11         | 2          | 0          | 2          | 0          | 90         | 0           | 7081       | 7081      
    CPU0_VDD_FIX_0V8     | 27         | 12         | 2          | 1          | 2          | 0          | 83         | 0           | 7081       | 7081      
    CPU0_DDR_VPPAB_2V5   | 28         | 13         | 2          | 1          | 2          | 0          | 248        | 0           | 7081       | 7081      
    CPU0_DDR_VPPCD_2V5   | 29         | 14         | 2          | 1          | 2          | 0          | 248        | 0           | 7081       | 7081      
    CPU1_DDR_VDD_0V8     | 30         | 15         | 2          | 1          | 2          | 0          | 80         | 0           | 7081       | 7081      
    CPU1_HVCC_1V2        | 31         | 16         | 2          | 1          | 2          | 0          | 122        | 0           | 7081       | 7081      
    CPU1_VDDQAB_1V2      | 32         | 17         | 2          | 1          | 2          | 0          | 119        | 0           | 7081       | 7081      
    CPU1_VDDQCD_1V2      | 33         | 18         | 2          | 1          | 2          | 0          | 119        | 0           | 7081       | 7081      
    CPU1_AVS_0V9         | 34         | 19         | 2          | 0          | 2          | 0          | 90         | 0           | 7081       | 7081      
    CPU1_VDD_FIX_0V8     | 35         | 20         | 2          | 1          | 2          | 0          | 84         | 0           | 7081       | 7081      
    CPU1_DDR_VPPAB_2V5   | 36         | 21         | 2          | 1          | 2          | 0          | 247        | 0           | 7081       | 7081      
    CPU1_DDR_VPPCD_2V5   | 37         | 22         | 2          | 1          | 2          | 0          | 248        | 0           | 7081       | 7081      
    CPU2_DDR_VDD_0V8     | 38         | 23         | 2          | 1          | 2          | 0          | 83         | 0           | 7081       | 7081      
    CPU2_HVCC_1V2        | 39         | 24         | 2          | 1          | 2          | 0          | 122        | 0           | 7081       | 7081      
    CPU2_VDDQAB_1V2      | 40         | 25         | 2          | 1          | 2          | 0          | 120        | 0           | 7081       | 7081      
    CPU2_VDDQCD_1V2      | 41         | 26         | 2          | 1          | 2          | 0          | 119        | 0           | 7081       | 7081      
    CPU2_AVS_0V9         | 42         | 27         | 2          | 0          | 2          | 0          | 90         | 0           | 7081       | 7081      
    CPU2_VDD_FIX_0V8     | 43         | 28         | 2          | 1          | 2          | 0          | 83         | 0           | 7081       | 7081      
    CPU2_DDR_VPPAB_2V5   | 44         | 29         | 2          | 1          | 2          | 0          | 248        | 0           | 7081       | 7081      
    CPU2_DDR_VPPCD_2V5   | 45         | 30         | 2          | 1          | 2          | 0          | 247        | 0           | 7081       | 7081      
    CPU3_DDR_VDD_0V8     | 46         | 31         | 2          | 1          | 2          | 0          | 78         | 0           | 7081       | 7081      
    CPU3_HVCC_1V2        | 47         | 32         | 2          | 1          | 2          | 0          | 117        | 0           | 7081       | 7081      
    CPU3_VDDQAB_1V2      | 48         | 33         | 2          | 1          | 2          | 0          | 119        | 0           | 7081       | 7081      
    CPU3_VDDQCD_1V2      | 49         | 34         | 2          | 1          | 2          | 0          | 119        | 0           | 7081       | 7081      
    CPU3_AVS_0V9         | 50         | 35         | 2          | 0          | 2          | 0          | 90         | 0           | 7081       | 7081      
    CPU3_VDD_FIX_0V8     | 51         | 36         | 2          | 1          | 2          | 0          | 83         | 0           | 7081       | 7081      
    CPU3_DDR_VPPAB_2V5   | 52         | 37         | 2          | 1          | 2          | 0          | 247        | 0           | 7081       | 7081      
    CPU3_DDR_VPPCD_2V5   | 53         | 38         | 2          | 1          | 2          | 0          | 247        | 0           | 7081       | 7081      
    CPU0Pex1610Temp      | 54         | 7          | 1          | 10         | 2          | 0          | 550        | 0           | 7080       | 7080      
    CPU0Pex1310aTemp     | 55         | 8          | 1          | 10         | 2          | 0          | 460        | 0           | 7080       | 7080      
    CPU0Pex1310bTemp     | 56         | 9          | 1          | 10         | 2          | 0          | 420        | 0           | 7080       | 7080      
    CPU1Pex1610Temp      | 57         | 10         | 1          | 10         | 2          | 0          | 563        | 0           | 7080       | 7080      
    CPU1Pex1310aTemp     | 58         | 11         | 1          | 10         | 2          | 0          | 440        | 0           | 7080       | 7080      
    CPU1Pex1310bTemp     | 59         | 12         | 1          | 10         | 2          | 0          | 440        | 0           | 7080       | 7080      
    CPU2Pex1610Temp      | 60         | 13         | 1          | 10         | 2          | 0          | 706        | 0           | 7080       | 7080      
    CPU2Pex1310aTemp     | 61         | 14         | 1          | 10         | 2          | 0          | 560        | 0           | 7080       | 7080      
    CPU2Pex1310bTemp     | 62         | 15         | 1          | 10         | 2          | 0          | 510        | 0           | 7080       | 7080      
    CPU3Pex1610Temp      | 63         | 16         | 1          | 10         | 2          | 0          | 700        | 0           | 7080       | 7080      
    CPU3Pex1310aTemp     | 64         | 17         | 1          | 10         | 2          | 0          | 580        | 0           | 7080       | 7080      
    CPU3Pex1310bTemp     | 65         | 18         | 1          | 10         | 2          | 0          | 520        | 0           | 7080       | 7080      
    CPU0Pex1610Power     | 66         | 0          | 5          | 10         | 2          | 0          | 560        | 0           | 7000       | 7000      
    CPU1Pex1610Power     | 67         | 1          | 5          | 10         | 2          | 0          | 520        | 0           | 7000       | 7000      
    CPU2Pex1610Power     | 68         | 2          | 5          | 10         | 2          | 0          | 560        | 0           | 7000       | 7000      
    CPU3Pex1610Power     | 69         | 3          | 5          | 10         | 2          | 0          | 530        | 0           | 7000       | 7000      
    CardEnvTemp          | 70         | 0          | 1          | 4          | 1          | 24         | 560        | 0           | 7000       | 7000      
    CardCoreTemp         | 71         | 1          | 1          | 0          | 1          | 24         | 670        | 0           | 7280       | 7280      
    CardSfpTemp          | 72         | 2          | 1          | 254        | 1          | 24         | 30719      | 0           | 7000       | 7000
  • Check the sensor alarm threshold. The command output varies depending on a specific product.

    iBMC:/->cliget -d sensorinformation 2
     
    Sensorname           | FruId      | UNRLimit   | UNRReLimit | UCLimit    | UCRLimit   | UNCLimit   | UNCRLimit  | LNRLimit   | LNRReLimit | LCLimit    | LCReLimit  | LNCLimit   | LNCReLimit | NoRecoverEnable
    Clock5310Temp        | 0          | 46         | 46         | 44         | 44         | 750        | 700        | 0          | 0          | 0          | 0          | 48         | 80         | 0         
    MosATemp             | 0          | 1200       | 1200       | 1100       | 1100       | 0          | 0          | 0          | 0          | 0          | 0          | 30         | 50         | 0         
    MosBTemp             | 0          | 1200       | 1200       | 1100       | 1100       | 0          | 0          | 0          | 0          | 0          | 0          | 30         | 50         | 0         
    BoardWindInTempA     | 0          | 46         | 46         | 630        | 430        | 470        | 430        | 0          | 0          | 0          | 0          | 40         | 70         | 0         
    IOCHi1822Temp        | 0          | 0          | 0          | 0          | 0          | 1050       | 1000       | 0          | 0          | 0          | 0          | 0          | 0          | 0         
    CPUTemp              | 0          | 46         | 0          | 1100       | 1050       | 1030       | 980        | 0          | 0          | 0          | 0          | 0          | 0          | 0         
    DimmTemp             | 0          | 46         | 0          | 44         | 44         | 950        | 900        | 0          | 0          | 0          | 0          | 0          | 0          | 0         
    EarTemp              | 0          | 46         | 46         | 580        | 380        | 420        | 380        | 0          | 0          | 0          | 0          | 20         | 50         | 0         
    Power0Temp           | 0          | 46         | 0          | 44         | 44         | 650        | 630        | 0          | 0          | 0          | 0          | 0          | 0          | 0         
    Power1Temp           | 1          | 46         | 0          | 44         | 44         | 650        | 630        | 0          | 0          | 0          | 0          | 0          | 0          | 0         
    Power2Temp           | 2          | 46         | 0          | 44         | 44         | 650        | 630        | 0          | 0          | 0          | 0          | 0          | 0          | 0         
    Power3Temp           | 3          | 46         | 0          | 44         | 44         | 650        | 630        | 0          | 0          | 0          | 0          | 0          | 0          | 0         
    SMMTemp              | 0          | 46         | 0          | 44         | 44         | 1000       | 950        | 0          | 0          | 0          | 0          | 0          | 0          | 0         
    BBUTemp              | 0          | 46         | 0          | 44         | 44         | 750        | 700        | 0          | 0          | 0          | 0          | 0          | 0          | 0         
    MOS0_12V0            | 0          | 46         | 0          | 0          | 0          | 1320       | 1260       | 0          | 0          | 0          | 0          | 1080       | 1140       | 0         
    VRD_POWER_5V0        | 0          | 46         | 0          | 0          | 0          | 550        | 525        | 0          | 0          | 0          | 0          | 450        | 475        | 0         
    BP_POWER_3V6         | 0          | 46         | 0          | 0          | 0          | 396        | 378        | 0          | 0          | 0          | 0          | 324        | 342        | 0         
    SysDiskA_3V3         | 0          | 46         | 0          | 0          | 0          | 363        | 346        | 0          | 0          | 0          | 0          | 297        | 313        | 0         
    SysDiskB_3V3         | 0          | 46         | 0          | 0          | 0          | 363        | 346        | 0          | 0          | 0          | 0          | 297        | 313        | 0         
    RTCBAT_3V0           | 0          | 0          | 0          | 0          | 0          | 330        | 320        | 0          | 0          | 0          | 0          | 230        | 240        | 0         
    AUX_POWER_3V6        | 0          | 0          | 0          | 0          | 0          | 396        | 378        | 0          | 0          | 0          | 0          | 324        | 342        | 0         
    CPU0_DDR_0V8         | 0          | 46         | 0          | 0          | 0          | 88         | 84         | 0          | 0          | 0          | 0          | 72         | 76         | 0         
    CPU0_HVCC_1V2        | 0          | 46         | 0          | 0          | 0          | 133        | 126        | 0          | 0          | 0          | 0          | 108        | 114        | 0         
    CPU0_VDDQAB_1V2      | 0          | 46         | 0          | 0          | 0          | 133        | 126        | 0          | 0          | 0          | 0          | 108        | 114        | 0         
    CPU0_VDDQCD_1V2      | 0          | 46         | 0          | 0          | 0          | 133        | 126        | 0          | 0          | 0          | 0          | 108        | 114        | 0         
    CPU0_AVS_0V9         | 0          | 46         | 0          | 0          | 0          | 99         | 95         | 0          | 0          | 0          | 0          | 81         | 85         | 0         
    CPU0_VDD_FIX_0V8     | 0          | 46         | 0          | 0          | 0          | 92         | 88         | 0          | 0          | 0          | 0          | 76         | 80         | 0         
    CPU0_DDR_VPPAB_2V5   | 0          | 46         | 0          | 0          | 0          | 275        | 262        | 0          | 0          | 0          | 0          | 225        | 237        | 0         
    CPU0_DDR_VPPCD_2V5   | 0          | 46         | 0          | 0          | 0          | 275        | 262        | 0          | 0          | 0          | 0          | 225        | 237        | 0         
    CPU1_DDR_VDD_0V8     | 0          | 46         | 0          | 0          | 0          | 88         | 84         | 0          | 0          | 0          | 0          | 72         | 76         | 0         
    CPU1_HVCC_1V2        | 0          | 46         | 0          | 0          | 0          | 133        | 126        | 0          | 0          | 0          | 0          | 108        | 114        | 0         
    CPU1_VDDQAB_1V2      | 0          | 46         | 0          | 0          | 0          | 133        | 126        | 0          | 0          | 0          | 0          | 108        | 114        | 0         
    CPU1_VDDQCD_1V2      | 0          | 46         | 0          | 0          | 0          | 133        | 126        | 0          | 0          | 0          | 0          | 108        | 114        | 0         
    CPU1_AVS_0V9         | 0          | 46         | 0          | 0          | 0          | 99         | 95         | 0          | 0          | 0          | 0          | 81         | 85         | 0         
    CPU1_VDD_FIX_0V8     | 0          | 46         | 0          | 0          | 0          | 92         | 88         | 0          | 0          | 0          | 0          | 76         | 80         | 0         
    CPU1_DDR_VPPAB_2V5   | 0          | 46         | 0          | 0          | 0          | 275        | 262        | 0          | 0          | 0          | 0          | 225        | 237        | 0         
    CPU1_DDR_VPPCD_2V5   | 0          | 46         | 0          | 0          | 0          | 275        | 262        | 0          | 0          | 0          | 0          | 225        | 237        | 0         
    CPU2_DDR_VDD_0V8     | 0          | 46         | 0          | 0          | 0          | 88         | 84         | 0          | 0          | 0          | 0          | 72         | 76         | 0         
    CPU2_HVCC_1V2        | 0          | 46         | 0          | 0          | 0          | 133        | 126        | 0          | 0          | 0          | 0          | 108        | 114        | 0         
    CPU2_VDDQAB_1V2      | 0          | 46         | 0          | 0          | 0          | 133        | 126        | 0          | 0          | 0          | 0          | 108        | 114        | 0         
    CPU2_VDDQCD_1V2      | 0          | 46         | 0          | 0          | 0          | 133        | 126        | 0          | 0          | 0          | 0          | 108        | 114        | 0         
    CPU2_AVS_0V9         | 0          | 46         | 0          | 0          | 0          | 99         | 95         | 0          | 0          | 0          | 0          | 81         | 85         | 0         
    CPU2_VDD_FIX_0V8     | 0          | 46         | 0          | 0          | 0          | 92         | 88         | 0          | 0          | 0          | 0          | 76         | 80         | 0         
    CPU2_DDR_VPPAB_2V5   | 0          | 46         | 0          | 0          | 0          | 275        | 262        | 0          | 0          | 0          | 0          | 225        | 237        | 0         
    CPU2_DDR_VPPCD_2V5   | 0          | 46         | 0          | 0          | 0          | 275        | 262        | 0          | 0          | 0          | 0          | 225        | 237        | 0         
    CPU3_DDR_VDD_0V8     | 0          | 46         | 0          | 0          | 0          | 88         | 84         | 0          | 0          | 0          | 0          | 72         | 76         | 0         
    CPU3_HVCC_1V2        | 0          | 46         | 0          | 0          | 0          | 133        | 126        | 0          | 0          | 0          | 0          | 108        | 114        | 0         
    CPU3_VDDQAB_1V2      | 0          | 46         | 0          | 0          | 0          | 133        | 126        | 0          | 0          | 0          | 0          | 108        | 114        | 0         
    CPU3_VDDQCD_1V2      | 0          | 46         | 0          | 0          | 0          | 133        | 126        | 0          | 0          | 0          | 0          | 108        | 114        | 0         
    CPU3_AVS_0V9         | 0          | 46         | 0          | 0          | 0          | 99         | 95         | 0          | 0          | 0          | 0          | 81         | 85         | 0         
    CPU3_VDD_FIX_0V8     | 0          | 46         | 0          | 0          | 0          | 92         | 88         | 0          | 0          | 0          | 0          | 76         | 80         | 0         
    CPU3_DDR_VPPAB_2V5   | 0          | 46         | 0          | 0          | 0          | 275        | 262        | 0          | 0          | 0          | 0          | 225        | 237        | 0         
    CPU3_DDR_VPPCD_2V5   | 0          | 46         | 0          | 0          | 0          | 275        | 262        | 0          | 0          | 0          | 0          | 225        | 237        | 0         
    CPU0Pex1610Temp      | 0          | 46         | 0          | 44         | 44         | 1200       | 1150       | 0          | 0          | 0          | 0          | 0          | 0          | 0         
    CPU0Pex1310aTemp     | 0          | 46         | 0          | 44         | 44         | 1200       | 1150       | 0          | 0          | 0          | 0          | 0          | 0          | 0         
    CPU0Pex1310bTemp     | 0          | 46         | 0          | 44         | 44         | 1200       | 1150       | 0          | 0          | 0          | 0          | 0          | 0          | 0         
    CPU1Pex1610Temp      | 0          | 46         | 0          | 44         | 44         | 1200       | 1150       | 0          | 0          | 0          | 0          | 0          | 0          | 0         
    CPU1Pex1310aTemp     | 0          | 46         | 0          | 44         | 44         | 1200       | 1150       | 0          | 0          | 0          | 0          | 0          | 0          | 0         
    CPU1Pex1310bTemp     | 0          | 46         | 0          | 44         | 44         | 1200       | 1150       | 0          | 0          | 0          | 0          | 0          | 0          | 0         
    CPU2Pex1610Temp      | 0          | 46         | 0          | 44         | 44         | 1200       | 1150       | 0          | 0          | 0          | 0          | 0          | 0          | 0         
    CPU2Pex1310aTemp     | 0          | 46         | 0          | 44         | 44         | 1200       | 1150       | 0          | 0          | 0          | 0          | 0          | 0          | 0         
    CPU2Pex1310bTemp     | 0          | 46         | 0          | 44         | 44         | 1200       | 1150       | 0          | 0          | 0          | 0          | 0          | 0          | 0         
    CPU3Pex1610Temp      | 0          | 46         | 0          | 44         | 44         | 1200       | 1150       | 0          | 0          | 0          | 0          | 0          | 0          | 0         
    CPU3Pex1310aTemp     | 0          | 46         | 0          | 44         | 44         | 1200       | 1150       | 0          | 0          | 0          | 0          | 0          | 0          | 0         
    CPU3Pex1310bTemp     | 0          | 46         | 0          | 44         | 44         | 1200       | 1150       | 0          | 0          | 0          | 0          | 0          | 0          | 0         
    CPU0Pex1610Power     | 0          | 46         | 0          | 920        | 900        | 0          | 0          | 0          | 0          | 0          | 0          | 0          | 0          | 0         
    CPU1Pex1610Power     | 0          | 46         | 0          | 920        | 900        | 0          | 0          | 0          | 0          | 0          | 0          | 0          | 0          | 0         
    CPU2Pex1610Power     | 0          | 46         | 0          | 920        | 900        | 0          | 0          | 0          | 0          | 0          | 0          | 0          | 0          | 0         
    CPU3Pex1610Power     | 0          | 46         | 0          | 920        | 900        | 0          | 0          | 0          | 0          | 0          | 0          | 0          | 0          | 0         
    CardEnvTemp          | 24         | 46         | 46         | 1100       | 890        | 950        | 890        | 0          | 0          | 0          | 0          | 0          | 0          | 0         
    CardCoreTemp         | 24         | 46         | 0          | 1200       | 1150       | 1050       | 1000       | 0          | 0          | 0          | 0          | 0          | 0          | 0         
    CardSfpTemp          | 24         | 46         | 0          | 44         | 44         | 750        | 730        | 0          | 0          | 0          | 0          | 0          | 0          | 0

System Response

None.

Parameter

Meaning

Sensorname

Sensor name.

Number

Number.

Diviceid

Device ID.

Type

Type.

SubType

Subtype.

LogicType

Logic type.

FruId

FRU code.

SensorVal

Sensor value.

AssertState

Alarm status.

AssertMask

Alarm mask.

DeAssertMask

Clear alarm mask.

UNRLimit

Threshold for generating a critical alarm.

UNRReLimit

Threshold for clearing a critical alarm.

UCLimit

Threshold for generating a major alarm.

UCRLimit

Threshold for clearing a major alarm.

UNCLimit

Threshold for generating a minor alarm.

UNCRLimit

Threshold for clearing a minor alarm.

LNRLimit

Lower threshold for generating a critical alarm.

LNRReLimit

Lower threshold for clearing a critical alarm.

LCLimit

Lower threshold for generating a major alarm.

LCReLimit

Lower threshold for clearing a major alarm.

LNCLimit

Lower threshold for generating a minor alarm.

LNCReLimit

Lower threshold for clearing a minor alarm.

NoRecoverEnable

Unrecoverable state.

Translation
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Updated: 2020-01-17

Document ID: EDOC1000181602

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