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Advanced O&M Command Reference

OceanStor 18000 and 18000F V5 Series V500R007

This document is applicable to OceanStor 18500 V5, 18800 V5, 18500F V5, and 18800F V5. Based on the CLI, this document describes how to use various commands classified by functionsand how to set the CLI and manage the storage system through these commands.

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The reset command is used to reset the SES.






serial port mode

Usage Guidelines

  • When you run the command, the SES system will restart. It takes about 30 seconds for the SES system from a restart to proper running. If services are running during the interval, delivering I/Os into disks may be blocked and interrupted, thereby interrupting services.
  • Running this command is a highly risky operation. Execute this command with caution when there are ongoing services.


In standard disk enclosure devices, run the "reset" command to reset SES.

reset cmd successful.

**                                                                    **
**                             SES System                             **
**   COPYRIGHT(C) 2010-2020 HUAWEI,INC. ALL RIGHTS RESERVED.          **
**                                                                    **

Boot version: R1-2016-02-20-B082
enter the ThreadX kernel

BoardType Gpio Value 0x1
FruNum CRC Read 0xd442ae, Saved 0xd442ae, Magic 0xaced55aa
Load Fan Register Funs!
set ALL disk_phy ssc_type 0 under rate 0x8, enable
Zone cfg iRv 0x0; Retry 1, valid is 1.
str data init success.
Sfp twi port init, board type is 33.
Info: SASZONE init success, Zone enable state is 0.
Buffering switch CRC Read 0xfec28155, Saved 0x3545ef9f, Magic 0xdb0398f, Switch 956330457
Local State Now Is Slave !INFO: FrameStatus From 0xff to 0x1

Firmware internal  Get fwdl type:0x3, flag:0x0
build: B082, Release 04.08.02
Flash active image build: B001, Release 32.85.00
Flash active data(Init String)  build: B255, Release 55.55.15, Release Type 0f
sas init ok
It is not SAS card,no need to notify BMC
Ses main start...
BOARD:local eeprom self test result irv = 0x0
Parse SysAlarmLed(1); SysPowerLed(1) by Uart
Parse ucDevSetFrameSysAlarm=0
Peer CustomRule_Mem, CRC 0x2ff983d4, FrameNumHex: 1

System Response


Updated: 2020-01-17

Document ID: EDOC1000181602

Views: 760103

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