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OSN 500 550 580 V100R008C50 Alarms and Performance Events Reference 02

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Huawei uses machine translation combined with human proofreading to translate this document to different languages in order to help you better understand the content of this document. Note: Even the most advanced machine translation cannot match the quality of professional translators. Huawei shall not bear any responsibility for translation accuracy and it is recommended that you refer to the English document (a link for which has been provided).
CLK_LOCK_FAIL

CLK_LOCK_FAIL

Description

The CLK_LOCK_FAIL is an alarm indicating a failure to lock the clock. When the NE clock frequency is synchronous with that of the upstream NE, the frequency is locked indicating that the NE has traced the upstream NE successfully. This alarm is reported only when the clock of the NE is unlocked.

Attribute

Alarm Severity Alarm Type

Major

Equipment alarm

Parameters

When you view an alarm on the network management system, select the alarm. In the Alarm Details field display the related parameters of the alarm. The alarm parameters are in the following format: Alarm Parameters (hex): parameter1 parameter2...parameterN. For details about each parameter, refer to the following table.

Name Meaning

Parameter 1

Indicates the alarm cause.

  • 0x01: The phase-locked loop (PLL) is in holdover or free-run mode.
  • 0x02: The Sync timestamp remains unchanged when the Precision Time Protocol (PTP) clock is synchronized.
  • 0x03: The phase discrimination value per unit of time exceeds the upper threshold.

Impact on the System

When this alarm occurs, the clock of the NE is unlocked and the NE clock cannot trace the upstream NE clock so that bit errors occur in services.

Possible Causes

The possible causes of the CLK_LOCK_FAIL alarm are as follows:

  • Cause 1: The clock source priority contains only internal clock sources when clocks are synchronized at physical layer.
  • Cause 2: The frequency deviation of the clock source exceeds the upper threshold when clocks are synchronized at physical layer.
  • Cause 3: A fault occurs on the physical links or optical modules of the clock source.
  • Cause 4: The Sync timestamp remains unchanged because a fault occurs on the clock board of the NE or upstream NE or IEEE 1588 service interface.

Procedure

  1. Cause 1: The clock source priority contains only internal clock sources when clocks are synchronized at physical layer.

    If... Then...

    The clock source priority table contains only internal clock sources

    Configure the clock source priority table again to contain other available clock sources. Check whether the alarm is cleared. If the alarm persists, go to 2.

    The clock source priority table contains other available clock sources

    1. Check whether the SYNC_C_LOS alarm occurs. If this alarm occurs, clear it first. Check whether the CLK_LOCK_FAIL alarm is cleared. If the alarm persists, go to the next step.
    2. Check whether the SSM protocol is enabled on the NE and its upstream NE. If not, enable the SSM protocol.
    3. Check whether the alarm is cleared. If the alarm persists, go to 2.

  2. Cause 2: The frequency deviation of the clock source exceeds the upper threshold when clocks are synchronized at physical layer.
    1. On the NMS, check whether the bit error alarm or other performance events are reported. If yes, clear them first. Then, check whether the CLK_LOCK_FAIL alarm is cleared.
    2. If the alarm persists, check whether the NE is tracing an external clock source.

      • If yes, check whether signals of the clock source is normal. If the signal is abnormal, switch the clock source to another one. Then, check whether the alarm is cleared. If the alarm persists, go to the next step.
      • If the NE is tracing a line clock source, go to the next step.

    3. Check whether the clock is configured correctly. If not, modify the configurations. Then, check whether the alarm is cleared.
    4. If the alarm persists, check whether the clock board is faulty. If yes, replace the clock board.
    5. Check whether the alarm is cleared. If the alarm persists, go to 3.
  3. Cause 3: A fault occurs on the physical links or optical modules of the clock source.
    1. Check whether the ETH_LOS or IN_PWR_ABN alarm is reported. If yes, clear it first.
    2. Check whether the alarm is cleared. If the alarm persists, go to 4.
  4. Cause 4: The Sync timestamp remains unchanged because a fault occurs on the clock board of the NE or upstream NE or IEEE 1588 service interface.
    1. Check whether alarms related to hardware, such as HARD_BAD, are reported by the clock board of the NE or its upstream NE or the IEEE 1588 service interface board. If yes, clear them immediately.
    2. Then, check whether the alarm is cleared. If the alarm persists, contact Huawei technical support engineers to handle the alarm.

Related Information

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Updated: 2019-01-21

Document ID: EDOC1100020975

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