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OSN 500 550 580 V100R008C50 Alarms and Performance Events Reference 02

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Uplink Signal Flow

Uplink Signal Flow

Lower order overhead bytes such as V5 and H4 are generated in the lower order uplink signal flow.


When the E1 electrical signal enters the PPI, the signal is transmitted to the mapping and demapping processor after clock extraction and data regeneration. At the same time, jitter suppression is performed.

The PPI detects and terminates the T_ALOS alarm. When it detects a T_ALOS alarm, it inserts all "1"s into the upper level circuit.

The LPA completes data adaptation.

If a T_ALOS alarm is detected, an E1_AIS alarm is reported. The E1_AIS alarm can be suppressed by a T_ALOS alarm when the corresponding alarm correlation is configured.

If the deviation of the upstream data rate is too high, FIFO overflow occurs at the transmit end of the lower order path. As a result, an LP_T_FIFO alarm is reported.


The LPT allows POHs to be inserted into a C-12 to form a VC-12.

The LPT inserts the signal label in bits 5-7 of the V5 byte, calculates the BIP-2 for the previous multiframe data, and stores the result in bits 1 and 2 of the V5 byte in the frame. If the path terminal error is detected in the downlink signal flow, bit 3 of the V5 byte is set to "1" in the next frame and an LP_REI alarm is generated.

The HPA adapts a VC-12 into a TU-12, maps it into a higher order VC-4, and then sends it to the cross-connect unit.

The per-byte frame offset between the VC-12 and the VC-4 is indicated by a TU-12 pointer. Each frame defines one of the V1, V2, V3, and V4 bytes, and every four frames compose a multiframe. The H4 byte that is used to determine the value of the V byte is also generated in this functional module.

Updated: 2019-01-21

Document ID: EDOC1100020975

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