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OSN 500 550 580 V100R008C50 Alarms and Performance Events Reference 02

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TIME_LOCK_FAIL

TIME_LOCK_FAIL

Description

The TIME_LOCK_FAIL is an alarm indicating a failure to lock the clock. When the NE time is synchronous with that of the upstream NE, the time is locked indicating that the NE has traced the upstream NE successfully. This alarm is reported only when the time of the NE is unlocked.

Attribute

Alarm Severity Alarm Type

Major

Equipment alarm

Parameters

When you view an alarm on the network management system, select the alarm. In the Alarm Details field display the related parameters of the alarm. The alarm parameters are in the following format: Alarm Parameters (hex): parameter1 parameter2...parameterN. For details about each parameter, refer to the following table.

Name Meaning

Parameter 1

Indicates the alarm cause.

  • 0x01: The time synchronization is disabled or the IEEE 1588v2 port time is not traced.
  • 0x02: The clock is unlocked because phase discrimination value per unit of time exceeds the upper threshold.
  • 0x03: The forward delay is abnormal.
  • 0x04: The backward delay is abnormal.
  • 0x05: The offset value accumulated per unit of time exceeds 240 ns.
  • 0x06: The offset values accumulated per unit of time is longer than 100 ns but shorter than 240 ns.

Impact on the System

When this alarm occurs, the time of the NE is unlocked and the NE time cannot trace the upstream NE time so that bit errors occur in services.

Possible Causes

The possible cause of the TIME_LOCK_FAIL alarm is as follows:

Cause: The timestamp changes greatly on the NE.

Procedure

  1. On the NMS, check whether the NE reports the CLK_LOCK_FAIL or TIME_NO_TRACE_MODE alarm. If yes, clear it first. Check whether the TIME_LOCK_FAIL alarm is cleared. If not, go to the next step.
  2. Check whether time is adjusted on the upstream NE. If yes, the alarm will disappear within 5 seconds. You do not have to handle it.

Related Information

Phrase discrimination: By comparing of two signals, add high speed pulse to the output signal pulse, and through the recorded number of added pulses to test the phase discrimination.

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Updated: 2019-01-21

Document ID: EDOC1100020975

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