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NE40E V800R010C00 Feature Description - WAN Access 01

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Huawei uses machine translation combined with human proofreading to translate this document to different languages in order to help you better understand the content of this document. Note: Even the most advanced machine translation cannot match the quality of professional translators. Huawei shall not bear any responsibility for translation accuracy and it is recommended that you refer to the English document (a link for which has been provided).
TDM Implementation on the Device

TDM Implementation on the Device

TDM Implementation Procedures

The frequency of E1 frames is 8000 frames/second, namely, 32 bytes/frame. An E1 frame consists of 32 timeslots and each timeslot corresponds to one byte of 32 bytes. For example, in CESoPSN mode, timeslot 0 (the byte 0 of 32 bytes) as the frame header, cannot carry data but is used for special processing. The other 31 timeslots correspond to bytes 1 to 31 of each E1 frame. In SAToP mode, no frame header is used and an E1 frame consists of 32 bytes.

Figure 7-7  TDM Implementation Procedures

As shown in Figure 7-8, the following implementation procedures goes from CE1, PE1, PE2, to CE2. In the direction of TDM transparent transmission from CE1 to PE1, in CESoPSN mode, PE1 encapsulates bytes 1 to 31 (payload) of the E1 frame received from CE1 in a PW packet. In SAToP mode, PE1 encapsulates 256 bits as payload from the bit stream in the form of 32 x 8 = 256bit in a PW packet. The frequency of E1 frames is fixed, and therefore PE1 receives data (31 bytes or 256 bits) of a fixed frequency from CE1 and then encapsulates data in the PW packet continuously. When the number of encapsulated frames reaches the pre-configured number, the whole PW packet is sent to the PSN.

In the encapsulation structure of a PW packet, the control word is mandatory. The L bit, R bit, and sequence number domain must be paid attention to. The L bit and R bit are used to carry alarm information. They are used when the TDM transparent transmission process transmits E1 frame data received by PE1 in a PW to an E1 interface of PE2 and PE1 needs to transmit alarm information (such as AIS and RDI) from CE1 to a remote device. PE1 reports received alarm information (AIS/RDI) to the control plane. The control plane modifies the L bit and R bit in the control word of the PW packet and then sends them with E1 frame data to PE2.

The sequence number is used to prevent PW packets from being discarded or disordered during forwarding on the PSN. Every time a PW packet is sent by PE1, the sequence number increases by 1.

The downstream traffic goes from PE2 to CE2. After receiving a PW packet from the PSN, PE2 caches the PW packet in different buffers by the mask included in the sequence number. For example, the sequence number is 16 bits and 256 buffers are configured for caching, and therefore the lowest 8 bits of the 16-bit sequence number is cached according to the map address. When the sequence number of received PW packet is sequential and the configured jitter buffer for the PW packet reaches the threshold, the PW packet is unpacked and then sent. For example, 8 frames are encapsulated in a packet. According to the frequency of 8000 frames/second, 8 frames require 1 ms; however, the jitter buffer is configured to 3 ms. Therefore, PW packets are not sent until its total number reaches 3.

If the PW packet corresponding to a sequence number is not received, an idle code (its payload is configurable) is sent.

Before the PW packet is resolved and the sequence number is processed, the L bit and R bit need to be processed. The L bit and R bit that carry alarm information is sent to PE2. After being extracted with payload, the PW packet is sent to CE2 at the same frequency as that of CE1 in the way that 31 bytes or 256 bits are included in a frame; otherwise, PE2 overruns or underruns. Therefore, clock synchronization (frequency synchronization) is required between the CE1 lock and PE2 clock in TDM transparent transmission.

The recommended mode for frequency synchronization in TDM transparent transmission is ACR/DCR, that is, PE2 calculates the sending clock frequency of CE1 according to the frequency of received PW packets and then uses the sending clock frequency of PE2 on the AC side to send E1 frame data.

Alarm Transparent Transmission

Before PWE3 is applied, CEs are directly connected by cables or fibers. In this way, alarms generated on CE1 can be directly detected by CE2. After PWE3 is applied, CE2 cannot directly detect alarms generated on CE1 because the PWE3 tunnel between CEs does not have the circuit features of TDM services. To implement better simulation, alarm transparent transmission is used.

Figure 7-8  Alarm transparent transmission

As shown in Figure 7-8, it is assumed that data is transmitted from CE2 to CE1. Alarm transparent transmission is the process of transmitting E1/T1 alarms on PE1 to downstream PE2 through the PW control word, restoring E1/T1 alarms, and then transmitting them to CE2, and vice versa.

The types of alarms that can be transparently transmitted are AIS and RDI. Involved PW control words are the L bit, R bit, and M bit.

Timeslot 0 Transparent Transmission

When the E1 frame adopts the structure of the CRC4 multiframe, bits SA4 to SA8 in timeslot 0 of the E1 frame are used to transmit the signaling defined by the operator.

If timeslot 0 is configured on both sides of the PSN, timeslot 0 in the upstream is processed in the same way as the process method of the data tunnel. Timeslot 0 is packed as a PW or bound with other timeslots as a PW. In the downstream, the Framer configures transparent transmission of SA bits, and SA bits use network data and other bits in timeslot 0 are generated locally.

Statistics of Alarms and Error Codes

  • E1

    Framed mode: LOS,LOF,RRDI,PAIS. Unframed mode: LOS and PAIS.

    Statistics: none.

  • CPOS

    Alarms: AUAIS,LOS,LOF,LOM,LOP,OOF,LAIS,LRDI,LREI,PAIS,PPLM,PRDI,PREI,PUNEQ and RROOL.

    Statistics: B1, B2, B3,SD and SF.

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Updated: 2018-07-04

Document ID: EDOC1100027168

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