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NE40E V800R010C00 Feature Description - WAN Access 01

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CEP

CEP

Basic Concepts

Circuit Emulation over Packet (CEP) emulates Synchronous Optical Network (SONET)/Synchronous Digital Hierarchy (SDH) circuits and services over MPLS. The emulation signals include:
  • Synchronous Payload Envelope (SPE)/Virtual Container (VC-N): STS-1/VC-3, STS-3c/VC-4, STS-12c/VC-4-4c, STS-48c/VC-4-16c, STS-192c/VC-4-64c, and so on.
  • Virtual Tributary (VT)/VC-N: VT1.5/VC-11, VT2/VC-12, VT3, and VT6/VC-2.

CEP treats these signals as serial data code flows and fragments and encapsulates them so that they can be transmitted over PW tunnels.

NOTE:

Currently, only SDH VC-4 signal encapsulation is supported.

CEP Encapsulation Format

Figure 7-9 shows the CEP encapsulation format.

Figure 7-9  CEP encapsulation format
  • MPLS Label

    The specified PSN header includes data required to forward packets from a PSN border gateway to a TDM border gateway.

    PWs are distinguished by MPLS labels that are carried on a specified PSN layer. To transmit bidirectional TDM services, two PWs that transmit in opposite directions are associated.

  • CEP Header

    Figure 7-10 shows the CEP header format.

    Figure 7-10  CEP header format

    The CEP header contains the following fields:

    • L bit: CEP-AIS. This bit must be set to 1 to signal to the downstream PE that a failure condition has been detected on the attachment circuit.
    • R bit: CEP-RDI. This bit must be set to 1 to signal to the upstream PE that a loss of packet synchronization has occurred. This bit must be set to 0 once packet synchronization is acquired.
    • N and P bits: These bits are used to explicitly relay negative and positive pointer adjustments events across the PSN. The use of N and P bits is optional. If not used, N and P bits must be set to 0.
    • FRG (2 bits): both bits must be set to 0.
    • Length (6 bits): length of a TDMoPSN packet (including the length of a CEP header, plus the length of the RTP header if used, and plus the length of the payload). If the length of the TDMoPSN packet is shorter than the minimum transmission unit (64 bytes) on the PSN, padding bits are used. If the length of the TDMoPSN packet is longer than 64 bytes, the entire field is padded with 0s.
    • Sequence Number (16 bits): used for PW sequencing and enabling the detection of discarded and disordered packets. The length of the sequence number is 16 bits and has unsigned circular space. The initial value of the sequence number is random.
  • Optional RTP

    An RTP header can carry timestamp information to a remote device to support packet recovery clock, such as DCR.

    By default, the RTP header is not configured. You can add it to packets. RTP configurations of PEs on both ends of a PWE3 must be the same; otherwise, the two PEs cannot communicate with each other.

    Figure 7-11  RTP header

    The sequence number (16 bits) in the RTP header is padded in the same way as that in the CEP header. The other bits in the RTP header are 0s.

  • TDM Payload

    The TDM packet payload can only be 783 bytes.

CEP Implementation

Each STM-1 frame consists of 9 rows and 270 columns. VC-4 occupies 9 rows and 261 columns, a total of 2349 bytes. As a CEP payload is 783-bytes long, one VC-4 can be broken into three CEP packets.

Figure 7-12  CEP Implementation

In the following example, CEP packets are transmitted along the path CE1 -> PE1 -> PE2 -> CE2. On the uplink of TDM transparent transmission from CE1 to PE1, PE1 fragments the VC-4 contained in an SDN frame sent by CE1 into 783-byte payloads and encapsulates the payloads into a PW packet. The frequency of SDH frames is fixed, and therefore PE1 receives data at a fixed frequency from CE1 and then encapsulates data into the PW packet continuously. When the number of encapsulated frames reaches the pre-configured number, the whole PW packet is sent to the PSN.

In the encapsulation structure of a PW packet, the CEP header is mandatory. The L bit and R bit are used to carry alarm information. PE1 transmits its received SDH frame data to an SDH interface of PE2 over a PW on the PSN and transmits alarm information (such as AIS and RDI) received from CE1 to a remote device. PE1 reports received alarm information (LOS/LOF/AUAIS/MSAIS/AULOP) to the control plane. The control plane modifies the L bit and R bit in the control word of the PW packet and then sends them with SDH frame data to PE2.

The sequence number is used to prevent PW packets from being forward in the wrong sequence (and therefore discarded) during forwarding on the PSN. Each time PE1 sends a PW packet, the sequence number increases by 1.

On the downlink of TDM transparent transmission from PE2 to CE2, upon receipt of a PW packet from the PSN, PE2 caches the PW packet in different buffers by the mask included in the sequence number. For example, if the sequence number is 16 bits and 256 buffers are configured for caching, the lowest 8 bits of the 16-bit sequence number are cached according to the map address. When the sequence number of the received PW packet is sequential and the configured jitter buffer for the PW packet reaches the threshold, the PW packet is unpacked and then sent.

If the PW packet corresponding to a sequence number is not received, an idle code (its payload is configurable) is sent.

The L and R bits need to be processed before the PW packet is parsed and the sequence number is processed. The L and R bits that carry alarm information are sent to PE2. After being extracted from the PW packet, these payloads are assembled into a VC-4 and integrated into an SDH frame. The SDH frame is then sent to CE2 at the same frequency as that when the SDH frame is sent by CE1. Otherwise, PE2 overruns or underruns. Therefore, clock synchronization (frequency synchronization) is required between the CE1 clock and PE2 clock in TDM transparent transmission.

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Updated: 2018-07-04

Document ID: EDOC1100027168

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