PCIe Slots

FusionServer Pro G560 V5 Compute Node User Guide 08

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PCIe Slots

The following tables describe the mapping between the PCIe slots and the CPUs and mezzanine cards, and list the PCIe standards.

Table 2-4 G560 V5 PCIe slot description

PCIe Device	CPU	PCIe Standard	Connector Width	Bus Width	Port Number	Device Size	Display on BMC
RAID controller card	CPU 1	PCIe 3.0	x8	x8	Port 1A	Non-standard device	RAID Card 1
Mezzanine card 1	CPU 1	PCIe 3.0	2 x16	2 x16	Port 2A, Port 3A	Non-standard device	/
Mezzanine card 2	CPU 2	PCIe 3.0	2 x16	2 x16	Port 2A, Port 3A	Non-standard device	/
NVMe SSD 4	CPU 1	PCIe 3.0	x4	x4	Port 1C	2.5-inch drive	Disk4
NVMe SSD 5	CPU 1	PCIe 3.0	x4	x4	Port 1D	2.5-inch drive	Disk5
NVMe SSD 6	CPU 2	PCIe 3.0	x4	x4	Port 1A	2.5-inch drive	Disk6
NVMe SSD 7	CPU 2	PCIe 3.0	x4	x4	Port 1B	2.5-inch drive	Disk7
NVMe SSD 8	CPU 2	PCIe 3.0	x4	x4	Port 1C	2.5-inch drive	Disk8
NVMe SSD 9	CPU 2	PCIe 3.0	x4	x4	Port 1D	2.5-inch drive	Disk9

NVMe SSDs 4 to 5 are connected to CPU 1, and NVMe SSDs 6 to 9 are connected to CPU 2. You are advised to configure NVMe SSDs based on the bandwidth balance.

Table 2-5 GP608 PCIe slots

PCIe Device	CPU	PCIe Standard	Connector Width	Bus Width	Port Number	Device Size	Display on BMC
PCIe slot 1	CPU 1	PCIe 3.0	x16	x16	Port 3A	Full-height full-length dual-slot card	GPU1
PCIe slot 2	CPU 1	PCIe 3.0	x16	x16	Port 3A	Full-height full-length dual-slot card	GPU2
PCIe slot 3	CPU 1	PCIe 3.0	x16	x16	Port 3A	Full-height full-length dual-slot card	GPU3
PCIe slot 4	CPU 1	PCIe 3.0	x16	x16	Port 3A	Full-height full-length dual-slot card	GPU4
PCIe slot 5	CPU 1/CPU 2^a	PCIe 3.0	x16	x16	Port 3A/Port 2A	Full-height full-length dual-slot card	GPU5
PCIe slot 6	CPU 1/CPU 2^a	PCIe 3.0	x16	x16	Port 3A/Port 2A	Full-height full-length dual-slot card	GPU6
PCIe slot 7	CPU 1/CPU 2^a	PCIe 3.0	x16	x16	Port 3A/Port 2A	Full-height full-length dual-slot card	GPU7
PCIe slot 8	CPU 1/CPU 2^a	PCIe 3.0	x16	x16	Port 3A/Port 2A	Full-height full-length dual-slot card	GPU8
PCIe slot 9	-	PCIe 3.0	x16	x8	-	Full-height full-length single-slot card	PCIe card 13
I/O slot 1	CPU 1	PCIe 3.0	x16	x16	Port 2A	Half-height half-length single-slot card	PCIe card 9
I/O slot 2	CPU 1	PCIe 3.0	x16	x16	Port 3A	Half-height half-length single-slot card	PCIe card 10
I/O slot 3	CPU 2	PCIe 3.0	x16	x16	Port 3A	Half-height half-length single-slot card	PCIe card 11
I/O slot 4	CPU 1/CPU 2^a	PCIe 3.0	x16	x16	Port 3A/Port 2A	Half-height half-length single-slot card	PCIe card 12
A: In logical topology 1, this slot is managed by CPU 1, and the corresponding port number is Port 3A; in logical topology 2, this slot is managed by CPU 2, and the corresponding port number is Port 2A.

The mezzanine cards to which PCIe slots 5 to 8 and I/O slot 4 are connected vary depending on the logical topology. For details, see Logical Structure.
PCIe slot 9 and I/O slot 1 are mutually exclusive and cannot be used at the same time. By default, I/O slot 1 is selected.
I/O slot 2 is available only in logical topology 2.
PCIe cards in PCIe slots 1 to 9 require Huawei-customized brackets.

Table 2-6 GS608 PCIe slots

PCIe Device	CPU	PCIe Standard	Connector Width	Bus Width	Port Number	Device Size	Display on BMC
GPU 1	CPU 1	PCIe 3.0	x16	x16	Port 2A	SXM2	GPU1
GPU 2	CPU 1	PCIe 3.0	x16	x16	Port 3A	SXM2	GPU2
GPU 3	CPU 1	PCIe 3.0	x16	x16	Port 2A	SXM2	GPU3
GPU 4	CPU 1	PCIe 3.0	x16	x16	Port 3A	SXM2	GPU4
GPU 5	CPU 2	PCIe 3.0	x16	x16	Port 2A	SXM2	GPU5
GPU 6	CPU 2	PCIe 3.0	x16	x16	Port 3A	SXM2	GPU6
GPU 7	CPU 2	PCIe 3.0	x16	x16	Port 2A	SXM2	GPU7
GPU 8	CPU 2	PCIe 3.0	x16	x16	Port 3A	SXM2	GPU8
I/O 1	CPU 1	PCIe 3.0	x16	X16	Port 2A	Half-height half-length single-slot card	PCIe card 9
I/O 2	CPU 1	PCIe 3.0	x16	x16	Port 3A	Half-height half-length single-slot card	PCIe card 10
I/O 3	CPU 2	PCIe 3.0	x16	x16	Port 2A	Half-height half-length single-slot card	PCIe card 11
I/O 4	CPU 2	PCIe 3.0	x16	x16	Port 3A	Half-height half-length single-slot card	PCIe card 12
PCIe slot	CPU 1	PCIe 3.0	X8	X8	Port 2A	Full-height full-length single-slot card	PCIe card 13

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Updated: 2021-10-26

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