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Configuration Guide - Device Management

S9300, S9300E, and S9300X V200R012C00

This document describes the configurations of Device Management, including device status query, hardware management, CSS, SVF, PoE, OPS, OIDS, energy-saving management, information center, fault management, NTP, synchronous ethernet, PTP.
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Licensing Requirements and Limitations for Synchronous Ethernet

Licensing Requirements and Limitations for Synchronous Ethernet

Involved Network Elements

BITS clock source

Licensing Requirements

Synchronous Ethernet is not under license control.

Version Requirements

Table 12-1  Products and versions supporting synchronous Ethernet

Series

Product

Software Version

S9300

S9303, S9306, S9312

V100R002, V100R003, V100R006(C00&C01), V200R001C00, V200R002C00, V200R003C00, V200R005C00SPC300, V200R006C00, V200R007C00, V200R008(C00&C10), V200R009C00, V200R010C00, V200R011C10, V200R012C00

S9300

S9310

V200R010C00, V200R011C10, V200R012C00

S9300E

S9303E, S9306E, S9312E

V200R001C00, V200R002C00, V200R003C00, V200R005C00SPC300, V200R006C00, V200R007C00, V200R008(C00&C10), V200R009C00, V200R010C00, V200R011C10, V200R012C00

S9300X

S9310X

V200R010C00, V200R011C10, V200R012C00

NOTE:
For details about software mappings, visit Hardware Query Tool and search for the desired product model.

Feature Limitations

Precautions

  • To use the synchronous Ethernet function, ensure that the CKM-clock daughter card is installed on a switch.
  • The synchronous Ethernet function applies only to the LE0DG24CEAS0, LE1D2S04SEC0, LE1D2X32SEC0, LE1D2H02QEC0, and X series boards (excluding the LE1D2G48TX1E, LE1D2G48TX1C, and LE3D2G48TX1L). On the LE1D2S04SEC0 and the X1E and X1C series boards, a switch needs to be configured to work in enhanced mode using the set service-mode command.
  • Synchronous Ethernet does not apply to GE electrical interfaces, including GE combo interfaces that work in electrical interface mode.

Clock Sources Supported by Switches

Table 12-2 lists the clock sources supported by switches.

Table 12-2  Supported clock sources

Clock No.

Clock Source Name

Description

0

Inner Clock

Clock signal generated by the internal oscillator of a clock daughter card.

1

BITS0

Clock signal sent or received by the BITS0 interface of the master main control board on the local device.

2

BITS1

Clock signal sent or received by the BITS1 interface of the master main control board on the local device.

3

Slave Board BITS0

Clock signal sent or received by the BITS0 interface of the slave main control board on the local device.

4

Slave Board BITS1

Clock signal sent or received by the BITS1 interface of the slave main control board on the local device.

5

Left Frame Clock

Clock signal sent from the left side of the frame by the LPUs with smaller slot IDs.

  • On the S9303 and S9303E, LPUs in slot 1 to slot 3 send clock signals from the left side of the frame.
  • On the S9306 and S9306E, LPUs in slot 1 to slot 3 send clock signals from the left side of the frame.
  • On the S9310 and S9310X, LPUs in slot 1 to slot 5 send clock signals from the left side of the frame.
  • On the S9312 and S9312E, LPUs in slot 1 to slot 6 send clock signals from the left side of the frame.

6

Right Frame Clock

Clock signal sent from the right side of the frame by the LPUs with larger slot IDs.

  • On the S9303 and S9303E, no LPUs reside on the right side of the frame.
  • On the S9306 and S9306E, LPUs in slot 4 to slot 6 send clock signals from the right side of the frame.
  • On the S9310 and S9310X, LPUs in slot 6 to slot 10 send clock signals from the right side of the frame.
  • On the S9312 and S9312E, LPUs in slot 7 to slot 12 send clock signals from the right side of the frame.

7

FSU

Clock source on the flexible service unit (FSU). This clock source is reserved.

8

Slave Board FSU

Clock source on the peer flexible service unit (FSU). This clock source is reserved.

9

System Clock

System clock. A system clock is the clock source automatically selected by a switch based on priorities and SSM quality levels or the clock source manually or forcibly specified.

10

Peer System Clock

System clock of the peer board.

  • The system clock, BITS0 clock, and BITS1 clock are external clocks used to synchronize clock signals. The external clocks can be selected as the master clock source.
  • The three external clocks can function both as a reference clock source of each other and the input of clock signals. Other clocks can function only as a reference clock source of an external clock.
  • A system clock can select any of the clocks with the ID of 0 to 8 as a reference clock source.
  • A BITS clock can select one of the clocks with the ID of 5 to 9 as a reference clock source.
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Updated: 2018-09-03

Document ID: EDOC1100038289

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