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S12700 V200R013C00 Log Reference

This document provides the explanations, causes, and recommended actions of logs on the product.
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Huawei uses machine translation combined with human proofreading to translate this document to different languages in order to help you better understand the content of this document. Note: Even the most advanced machine translation cannot match the quality of professional translators. Huawei shall not bear any responsibility for translation accuracy and it is recommended that you refer to the English document (a link for which has been provided).
CLOCK

CLOCK

CLOCK/4/BITS_SWITCH

Message

CLOCK/4/BITS_SWITCH:BITS[ULONG] switches from [STRING] to [STRING].

Description

The clock source is switched.

Parameters

Parameter Name Parameter Meaning

[ULONG]

Indicates the number of BITS output interface. The values are as follows:
  • 0: Indicates that the source clock signal is output from BITS0.
  • 1: indicates that the source clock signal is output from BITS1.

[STRING]

Indicates the type of the clock source. The values are as follows:
  • 0) Inner Clock: internal clock.
  • 1) BITS0: BITS0 clock.
  • 2) BITS1: BITS1 clock.
  • 3) Peer Board BITS0: BITS0 clock of the peer board.
  • 4) Peer Board BITS1: BITS1 clock of the peer board.
  • 5) Left Frame Clock: clock of the left frame.
  • 6) Right Frame Clock: clock of the right frame.
  • 7) FSU: flexible service unit.
  • 8) Peer Board FSU: flexible service unit of the peer board.
  • 9) System Clock: system clock.
  • 10) Peer System Clock: system clock of the peer frame.

Possible Causes

The clock source is switched.

Procedure

  • This log message is informational and no action is required.

CLOCK/4/BITS_SW_FR_IVLD

Message

CLOCK/4/BITS_SW_FR_IVLD:BITS[ULONG] switches from the invalid source to [STRING].

Description

The BITS clock source is selected for the first time.

Parameters

Parameter Name Parameter Meaning

[ULONG]

Indicates the number of BITS output interface. The values are as follows:
  • 0: Indicates that the source clock signal is output from BITS0.
  • 1: indicates that the source clock signal is output from BITS1.

[STRING]

Indicates the type of the clock source. The values are as follows:
  • 0) Inner Clock: internal clock.
  • 1) BITS0: BITS0 clock.
  • 2) BITS1: BITS1 clock.
  • 3) Peer Board BITS0: BITS0 clock on the peer board.
  • 4) Peer Board BITS1: BITS1 clock on the peer board.
  • 5) Left Frame Clock: clock of the left frame.
  • 6) Right Frame Clock: clock of the right frame.
  • 7) FSU: flexible service unit.
  • 8) Peer Board FSU: flexible service unit of the peer board.
  • 9) System Clock: system clock.
  • 10) Peer System Clock: system clock of the peer board.

Possible Causes

The BITS clock source is selected for the first time.

Procedure

  • This log message is informational and no action is required.

CLOCK/4/CHIP_ERROR

Message

CLOCK/4/CHIP_ERROR:The Clock Chip on the clock board has an error.

Description

The clock board detects that the clock chip is faulty.

Parameters

Parameter Name Parameter Meaning
None. None.

Possible Causes

The clock chip is faulty.

Procedure

  • Run the display clock self-test-result command to manually detect the clock chip, collect the detection result, and contact technical support personnel.

CLOCK/4/CHIP_RECOVER

Message

CLOCK/4/CHIP_RECOVER:The clock chip on the clock board recovers.

Description

The clock board detects that the clock chip is recovered.

Parameters

None.

Possible Causes

The fault on the clock chip is rectified.

Procedure

  • This log message is informational and no action is required.

CLOCK/4/DCLS_LOS

Message

CLOCK/4/DCLS_LOS:The BITS[ULONG] DCLS signal is lost.

Description

The BITS input DCLS signal is lost.

Parameters

Parameter Name Parameter Meaning
[ULONG] Indicates the number of the BITS interface. The values are as follows:

0: BITS0 interface

1: BITS1 interface

Possible Causes

1. The device where the BITS interface resides is faulty.

2. The cable connection between the BITS interface and the local device is abnormal.

Procedure

  • Check whether the BITS interface is working normally by running the display clock self-test-result command to check whether the status of components including the E1/T1 framer and FPGA is normal.
  • Check whether the link is normal.
  • Check whether the BITS interface sends DCLS signal.
  • Contact technical support personnel.

CLOCK/4/DCLS_RECOVER

Message

CLOCK/4/DCLS_RECOVER:The BITS[ULONG] DCLS is restored.

Description

The BITS input DCLS signal is restored.

Parameters

Parameter Name Parameter Meaning
[ULONG] Indicates the number of the BITS input interface. The values are as follows:

0: BITS0 input interface

1: BITS1 input interface

Possible Causes

The DCLS signal from the BITS input interface recovers.

Procedure

  • This log message is informational and no action is required.

CLOCK/4/DSP_ERROR

Message

CLOCK/4/DSP_ERROR:The DSP on the clock board has an error.

Description

The clock board detects that the DSP is faulty.

Parameters

Parameter Name Parameter Meaning
None. None.

Possible Causes

1: The DSP program is not loaded.

2: The clock board is faulty.

Procedure

  1. Restart the MPU to check whether the log persists.

    • If not, the DSP program is not loaded normally.
    • If so, the clock board is faulty.

  2. Collect log information and configuration information, and then contact technical support personnel. You can collect diagnostic information using the display diagnostic-information command.

CLOCK/4/DSP_RECOVER

Message

CLOCK/4/DSP_RECOVER:The DSP on the clock board recovers.

Description

The clock board detects that the DSP is recovered.

Parameters

None.

Possible Causes

The DSP on the clock board recovers.

Procedure

  • This log message is informational and no action is required.

CLOCK/4/FPGA_ERROR

Message

CLOCK/4/FPGA_ERROR:The FPGA on the clock board has an error.

Description

The clock board detects that the FPGA does not work normally.

Parameters

Parameter Name Parameter Meaning
None. None.

Possible Causes

1: The FPGA is not loaded.

2: The clock board is faulty.

Procedure

  1. Restart the MPU to check whether the log persists.

    • If not, the FPGA is not loaded normally.
    • If so, the clock board is faulty.

  2. Collect log information and configuration information, and then contact technical support personnel. You can collect diagnostic information using the display diagnostic-information command.

CLOCK/4/FPGA_RECOVER

Message

CLOCK/4/FPGA_RECOVER:The FPGA on the clock board recovers.

Description

The clock board detects that the FPGA is recovered.

Parameters

None.

Possible Causes

The FPGA on the clock board recovers.

Procedure

  • This log message is informational and no action is required.

CLOCK/4/FRAMER_ERROR

Message

CLOCK/4/FRAMER_ERROR:The E1/T1 Framer on the clock board has an error.

Description

The clock board detects that the E1/T1 framer is faulty.

Parameters

Parameter Name Parameter Meaning
None. None.

Possible Causes

The clock chip is faulty.

Procedure

  • Run the display clock self-test-result command to manually detect the clock chip, collect the detection result, and contact technical support personnel.

CLOCK/4/FRAMER_RECOVER

Message

CLOCK/4/FRAMER_RECOVER:The E1/T1 Framer on the clock board recovers.

Description

The clock board detects that the E1/T1 framer is recovered.

Parameters

None.

Possible Causes

The E1/T1 framer on the clock board recovers.

Procedure

  • This log message is informational and no action is required.

CLOCK/4/FRAME_SRC

Message

CLOCK/4/FRAME_SRC:[STRING] is selected as [STRING] to transmit clock signal to the clock board.

Description

An interface is selected as the clock source of left frame or right frame to transmit clock signal to the clock board.

Parameters

Parameter Name Parameter Meaning

[STRING]

Indicates the name of an interface.

[STRING]

Indicates the name of the clock source. The values are as follows:
  • 1) Left Frame Clock: clock of the left frame.
  • 2) Right Frame Clock: clock of the right frame.

Possible Causes

The system obtains clock signal from an interface.

Procedure

  • This log message is informational and no action is required.

CLOCK/4/FREQ_INSTANT_CHG

Message

CLOCK/4/FREQ_INSTANT_CHG:The frequency changes instantly. (Value=[LONG], Count=[ULONG])

Description

The number of frequency changes is not 0. The log records the latest change and number of frequency changes.

Parameters

Parameter Name Parameter Meaning

[LONG]

Indicates the latest frequency after change.

[ULONG]

Indicates the counter of frequency change.

Possible Causes

The performance of the traced clock source degrades or the jitter occurs.

Procedure

  • If the clock source is switched, this is a normal situation.
  • If the clock source of the upstream device is switched, this is a normal situation.
  • Run the display clock { bits0 | bits1 } command to view the BITS interface configuration. Check whether the clock configurations of upstream and downstream devices are correct, for example, whether bit/hz in the output mode of the upstream device is the same as that in the input mode of the local device.
  • Check the frequent offset of the upstream clock source. Tools may be required.
  • After the clock source is switched, if the log is generated on all interfaces of the local device, the local clock board may be faulty. Then perform an active/standby switchover on the clock boards.
  • Record this log message and contact technical support personnel.

CLOCK/4/FREQ_OFFSET

Message

CLOCK/4/FREQ_OFFSET:The clock source [STRING] is selected as [STRING], and its frequency has offset. (LastPPM=[STRING], CurPPM=[STRING])

Description

The offset of current clock source exceeds 1 ppm.

Parameters

Parameter Name Parameter Meaning

[STRING]

Indicates the type of the clock source:
  • 0) Inner Clock: internal clock.
  • 1) BITS0: BITS0 clock.
  • 2) BITS1: BITS1 clock.
  • 3) Peer Board BITS0: BITS0 interface of the peer board.
  • 4) Peer Board BITS1: BITS1 interface of the peer board.
  • 5) Left Frame Clock: clock of the left frame.
  • 6) Right Frame Clock: clock of the right frame.
  • 7) FSU: flexible service unit.
  • 8) Peer Board FSU: flexible service unit of the peer board.
  • 9) System Clock: system clock.
  • 10) Peer System Clock: system clock of the peer board.

[STRING]

Indicates the type of the clock source:
  • 0) system: internal clock
  • 1) bits0: BITS0
  • 2) bits1: BITS1

[STRING]

Indicates the last frequency offset.

[STRING]

Indicates the current frequency offset.

Possible Causes

The performance of the traced clock source degrades.

Procedure

  • If the clock source is switched, this is a normal situation.
  • If the clock source of the upstream device is switched, this is a normal situation.
  • Run the display clock { bits0 | bits1 } command to view the BITS interface configuration. Check whether the clock configurations of upstream and downstream devices are correct, for example, whether bit/hz in the output mode of the upstream device is the same as that in the input mode of the local device.
  • Check the frequent offset of the upstream clock source. The tool may be required.
  • After the clock source is switched, if the log is generated on all interfaces of the local device, the local clock board may be faulty. Then perform an active/standby switchover on the clock boards.
  • Record this log message and contact technical support personnel.

CLOCK/4/FR_SW_FAIL

Message

CLOCK/4/FR_SW_FAIL:The [STRING] clock source of forced switchover fails. (ClockSource=[STRING])

Description

The forcible switchover signal is invalid.

Parameters

Parameter Name Parameter Meaning

[STRING]

Indicates the type of source selection:
  • 1) system: system clock
  • 2) BITS0: BITS0 output
  • 3) BITS1: BITS1 output

[STRING]

Indicates the type of the clock source:
  • 0) Inner Clock: internal clock.
  • 1) BITS0: BITS0 clock.
  • 2) BITS1: BITS1 clock.
  • 3) Peer Board BITS0: BITS0 clock of the peer board.
  • 4) Peer Board BITS1: BITS1 clock of the peer board.
  • 5) Left Frame Clock: clock of the left frame.
  • 6) Right Frame Clock: clock of the right frame.
  • 7) FSU: flexible service unit.
  • 8) Peer Board FSU: flexible service unit of the peer board.
  • 9) System Clock: system clock.
  • 10) Peer System Clock: system clock of the peer board.

Possible Causes

1: The clock source fails.

2: The offset of the clock source is large after the offset detection is enabled.

Procedure

  • Check whether the upstream device works normally.
  • Check whether the link is normal.
  • Check whether the upstream device transmits clock signal.
  • Run the display clock freq-deviation-detect-range command to view the frequency offset detection range. Check whether the frequency offset of the total received signal is large.
  • Contact technical support personnel.

CLOCK/4/FR_SW_RECOVER

Message

CLOCK/4/FR_SW_RECOVER:The [STRING] clock source of force switch is restored. (ClockSource=[STRING])

Description

The forcible switchover signal is restored.

Parameters

Parameter Name Parameter Meaning

[STRING]

Indicates the type of source selection. The values are as follows:
  • 1) system: system clock
  • 2) BITS0: BITS0 output
  • 3) BITS1: BITS1 output

[STRING]

Indicates the type of the clock source. The values are as follows:
  • 0) Inner Clock: internal clock.
  • 1) BITS0: BITS0 clock.
  • 2) BITS1: BITS1 clock.
  • 3) Peer Board BITS0: BITS0 clock of the peer board.
  • 4) Peer Board BITS1: BITS1 clock of the peer board.
  • 5) Left Frame Clock: clock of the left frame.
  • 6) Right Frame Clock: clock of the right frame.
  • 7) FSU: flexible service unit.
  • 8) Peer Board FSU: flexible service unit of the peer board.
  • 9) System Clock: system clock.
  • 10) Peer System Clock: system clock of the peer board.

Possible Causes

The signal of the clock source recovers.

Procedure

  • This log message is informational and no action is required.

CLOCK/4/INT_PROC_COST

Message

CLOCK/4/INT_PROC_COST:The tick cost of processing clock interruption exceeds 100ms. (InterruptType=[ULONG], TickCost=[ULONG])

Description

If clock interruption duration exceeds 100ms, an error may occur in software processing. This log is used to locate software design bugs.

Parameters

Parameter Name Parameter Meaning

InterruptType

Indicates the clock interruption type.

TickCost

Indicates the time spent on interruption processing.

Possible Causes

If the clock interruption process contains the tasks that are waiting for resources, for example, the print task, the channel may be blocked. The log is generated when the clock interruption duration exceeds 100ms.

Procedure

  • Collect log information and configuration information, and then contact technical support personnel. You can collect diagnostic information using the display diagnostic-information command.

CLOCK/4/LOCK_FAIL

Message

CLOCK/4/LOCK_FAIL:The clock cannot be locked.

Description

After three times of jitter, the clock status of the clock board degrades.

Parameters

Parameter Name Parameter Meaning
None. None.

Possible Causes

1. The jitter of the traced clock source is high.

2. If the clock source is changed from the external clock source to the local clock source, this log is generated. It is normal.

Procedure

  1. Run the display clock mode command to check whether the traced time source is correct, and run the display clock source command to check whether the status of each time source is correct.
  2. If the preceding information is correct, Collect log information and configuration information, and then contact technical support personnel. You can collect diagnostic information using the display diagnostic-information command.

CLOCK/4/LOCK_SUCC

Message

CLOCK/4/LOCK_SUCC:The clock is locked successfully.

Description

After three times of jitter, the clock lock status of the clock board is improved.

Parameters

None.

Possible Causes

The external clock source is traced successfully.

Procedure

  • This log message is informational and no action is required.

CLOCK/4/OFFSET_ABNORMAL

Message

CLOCK/4/OFFSET_ABNORMAL:The time offset is abnormal. (Up400nsCount=[ULONG], 200ns-400nsCount=[ULONG], 100ns-200nsCount=[ULONG], 50ns-100nsCount=[ULONG])

Description

The time offset exceeds the threshold, 50ns.

Parameters

Parameter Name Parameter Meaning

[ULONG]

Indicates the number of times the time offset becomes greater than 400ns.

[ULONG]

Indicates the number of times the time offset is between 200ns and 400ns.

[ULONG]

Indicates the number of times the time offset is between 100ns and 200ns.

[ULONG]

Indicates the number of times the time offset is between 50ns and 100ns.

Possible Causes

1. Generally, jitter occurs during the switchover of clock source. This log is generated when the jitter occurs.

2. The performance of the traced clock source degrades, for example, the time jitter occurs.

Procedure

  • If the clock source is switched, this is a normal situation.
  • If the clock source of the upstream device is switched, this is a normal situation.
  • After the clock source is switched, if the log is generated on all the interfaces of the local device, the clock board of the local device may be faulty. Then perform an active/standby switchover. If the log does not occur, the original active clock board is faulty. You can replace the clock board.
  • Record this log message and contact technical support personnel.

CLOCK/4/OFFSET_ADJUST

Message

CLOCK/4/OFFSET_ADJUST:The time offset is adjusted. (AbnormalOffset=[LONG], SendToLogicOffset=[LONG])

Description

The time offset is adjusted when the clock and time are locked. The log records the abnormal offset and offset sent to logic.

Parameters

Parameter Name Parameter Meaning

[LONG]

Indicates the offset value.

[LONG]

Indicates the offset of the signal sent to the logic.

Possible Causes

1. Generally, jitter occurs during the switchover of clock source. This log is generated when the jitter occurs.

2. The performance of the traced clock source degrades, for example, the time jitter occurs.

Procedure

  • If the clock source is switched, this is a normal situation.
  • If the clock source of the upstream device is switched, this is a normal situation.
  • After the clock source is switched, if the log is generated on all the interfaces of the local device, the clock board of the local device may be faulty. Then perform an active/standby switchover. If the log does not occur, the original active clock board is faulty. You can replace the clock board.
  • Record this log message and contact technical support personnel.

CLOCK/4/OSC_25M_ERROR

Message

CLOCK/4/OSC_25M_ERROR:The Crystal Oscillator of DSP on the clock board has an error.

Description

The clock board detects that the crystal oscillator of DSP is faulty.

Parameters

Parameter Name Parameter Meaning
None. None.

Possible Causes

The clock chip is faulty.

Procedure

  • Run the display clock self-test-result command to manually detect the clock chip, collect the detection result, and contact technical support personnel.

CLOCK/4/OSC_25M_RECOVER

Message

CLOCK/4/OSC_25M_RECOVER:The Crystal Oscillator of DSP on the clock board recovers.

Description

The clock board detects that the crystal oscillator of DSP is recovered.

Parameters

None.

Possible Causes

The DSP crystal oscillator on the clock board recovers.

Procedure

  • This log message is informational and no action is required.

CLOCK/4/OSC_2M_ERROR

Message

CLOCK/4/OSC_2M_ERROR:The Crystal Oscillator of E1/T1 Framer has an error.

Description

The clock board detects that the crystal oscillator E1/T1 framer is faulty.

Parameters

Parameter Name Parameter Meaning
None. None.

Possible Causes

The clock chip is faulty.

Procedure

  • Run the display clock self-test-result command to manually detect the clock chip, collect the detection result, and contact technical support personnel.

CLOCK/4/OSC_2M_RECOVER

Message

CLOCK/4/OSC_2M_RECOVER:The Crystal Oscillator of E1/T1 Framer recovers.

Description

The clock board detects that the crystal oscillator E1/T1 framer is recovered.

Parameters

Parameter Name Parameter Meaning

None.

None.

Possible Causes

The crystal oscillator of the E1/T1 framer is recovered.

Procedure

  • This log message is informational and no action is required.

CLOCK/4/OSC_388M_ERROR

Message

CLOCK/4/OSC_388M_ERROR:The crystal oscillator of clock chip on the clock board has an error.

Description

The clock board detects that the crystal oscillator of clock chip is faulty.

Parameters

Parameter Name Parameter Meaning
None. None.

Possible Causes

The clock chip is faulty.

Procedure

  • Run the display clock self-test-result command to manually detect the clock chip, collect the detection result, and contact technical support personnel.

CLOCK/4/OSC_388M_RECOVER

Message

CLOCK/4/OSC_388M_RECOVER:The crystal oscillator of clock chip on the clock board recovers.

Description

The clock board detects that the crystal oscillator of clock chip is recovered.

Parameters

None.

Possible Causes

The fault on the crystal oscillator of the clock chip is rectified.

Procedure

  • This log message is informational and no action is required.

CLOCK/4/STOP_SLOT_SRC

Message

CLOCK/4/STOP_SLOT_SRC:The slot [ULONG] stops delivering clock signal to the clock board.

Description

During clock source selection in a frame, a slot stops sending clock signals.

Parameters

Parameter Name Parameter Meaning

[ULONG]

Specifies the slot ID.

Possible Causes

1. The clock source is switched to another slot according to the source selection rule.

2. The frame priority of the interface is deleted.

3. The interface becomes Down.

4. The interface is a 1000M electrical interface.

5. The interface is configured with loopback.

Procedure

  • If the clock source is switched to another slot in the same frame, the log is normal.
  • If the log is generated in other cases, do as follows:
    1. Run the display interface interface-type interface-number command to check whether the interface is in Down state. If so, rectify the fault to ensure that the interface is Up.
    2. Run the display interface interface-type interface-number command to check whether the interface is a 1000M electrical interface. The 1000M electrical interface does not support Ethernet synchronization. Do not use this type of interface.
    3. Check whether the loopback internal command is configured on the interface. If so, cancel the configuration.
    4. Check whether the interface has the frame priority configured using the clock priority command. If not, configure the frame priority for it.
    5. If the preceding information is correct, Collect log information and configuration information, and then contact technical support personnel. You can collect diagnostic information using the display diagnostic-information command.

CLOCK/4/SYNC_BAD

Message

CLOCK/4/SYNC_BAD:[STRING] clock synchronization is bad. (CurClockSource=[STRING])

Description

Frequent offset of the clock source exceeds the threshold three consecutive times. This indicates that the clock synchronization fails.

Parameters

Parameter Name Parameter Meaning

[STRING]

Indicates the type of source selection. The values are as follows:
  • 1) system: system clock.
  • 2) bits0: bits0 clock.
  • 3) bits1: bits1 clock.

[STRING]

Indicates the type of the clock source. The values are as follows:
  • 0) Inner Clock: internal clock.
  • 1) BITS0: BITS0 clock.
  • 2) BITS1: BITS1 clock.
  • 3) Peer Board BITS0: BITS0 clock on the peer board.
  • 4) Peer Board BITS1: BITS1 clock on the peer board.
  • 5) Left Frame Clock: clock of the left frame.
  • 6) Right Frame Clock: clock of the right frame.
  • 7) FSU: flexible service unit.
  • 8) Peer Board FSU: flexible service unit of the peer board.
  • 9) System Clock: system clock.
  • 10) Peer System Clock: system clock of the peer board.

Possible Causes

The performance of the traced clock source degrades.

Procedure

  • If the clock source is switched, this is a normal situation.
  • If the clock source of the upstream device is switched, this is a normal situation.
  • Check whether the clock configurations of the upstream device and downstream device are correct and whether the output mode of the upstream device is the same as the input mode of the local device (bit/hz).
  • Check the frequent offset of the upstream clock source. The tool may be required.
  • After the clock source is switched, if the log is generated on all interfaces of the local device, the local clock board may be faulty. Then perform an active/standby switchover on the clock boards.
  • Record this log message and contact technical support personnel.

CLOCK/4/SYNC_FAIL

Message

CLOCK/4/SYNC_FAIL:The clock synchronization fails.

Description

The time synchronization condition of the clock board degrades.

Parameters

None.

Possible Causes

The performance of the traced clock source degrades or the jitter occurs.

Procedure

  • Check whether the clock configurations of the upstream device and downstream device are correct and whether the output mode of the upstream device is the same as the input mode of the local device (bit/hz).
  • Check the frequent offset of the upstream clock source. The tool may be required.
  • After the clock source is switched, if the log is generated on all interfaces of the local device, the local clock board may be faulty. Then perform an active/standby switchover on the clock boards.
  • Record this log message and contact technical support personnel.

CLOCK/4/SYNC_SUCC

Message

CLOCK/4/SYNC_SUCC:The clock synchronization succeeds.

Description

The time synchronization condition of the clock board is improved.

Parameters

None.

Possible Causes

The performance of the traced clock source is restored.

Procedure

  • This log message is informational and no action is required.

CLOCK/4/SYSTEM_SWITCH

Message

CLOCK/4/SYSTEM_SWITCH:The system source selected switches from [STRING] to [STRING], and the system clock runs at [STRING] mode.

Description

The clock source is switched. The log records the current clock operation mode.

Parameters

Parameter Name Parameter Meaning

[STRING]

Indicates the type of the clock source. The values are as follows:
  • 0) Inner Clock: internal clock.
  • 1) BITS0: BITS0 clock.
  • 2) BITS1: BITS1 clock.
  • 3) Peer Board BITS0: BITS0 clock of the peer board.
  • 4) Peer Board BITS1: BITS1 clock of the peer board.
  • 5) Left Frame Clock: clock of the left frame.
  • 6) Right Frame Clock: clock of the right frame.
  • 7) FSU: flexible service unit.
  • 8) Peer Board FSU: flexible service unit of the peer board.
  • 9) System Clock: system clock.
  • 10) Peer System Clock: system clock of the peer board.

[STRING]

Indicates the type of the clock source. The values are as follows:
  • 0) Inner Clock: internal clock
  • 1) BITS0: BITS0 clock.
  • 2) BITS1: BITS1 clock.
  • 3) Peer Board BITS0: BITS0 clock of the peer board.
  • 4) Peer Board BITS1: BITS1 clock of the peer board.
  • 5) Left Frame Clock: clock of the left frame.
  • 6) Right Frame Clock: clock of the right frame.
  • 7) FSU: flexible service unit.
  • 8) Peer Board FSU: flexible service unit of the peer board.
  • 9) System Clock: system clock.
  • 10) Peer System Clock: system clock of the peer board.

[STRING]

Indicates the operation mode of the clock. The values are as follows:
  • 1) free
  • 2) hold
  • 3) trace

Possible Causes

The clock source is switched.

Procedure

  • This log message is informational and no action is required.

CLOCK/4/SYS_SW_FR_IVLD

Message

CLOCK/4/SYS_SW_FR_IVLD:The system source selected switches from the invalid source to [STRING], and the system clock runs at [STRING] mode.

Description

The system clock source is selected for the first time.

Parameters

Parameter Name Parameter Meaning

[STRING]

Indicates the type of the clock source. The values are as follows:
  • 0) Inner Clock: internal clock.
  • 1) BITS0: BITS0 clock.
  • 2) BITS1: BITS1 clock.
  • 3) Peer Board BITS0: BITS0 interface of the peer board.
  • 4) Peer Board BITS1: BITS1 interface of the peer board.
  • 5) Left Frame Clock: clock of the left frame.
  • 6) Right Frame Clock: clock of the right frame.
  • 7) FSU: flexible service unit.
  • 8) Peer Board FSU: flexible service unit of the peer board.
  • 9) System Clock: system clock.
  • 10) Peer System Clock: system clock of the peer board.

[STRING]

Indicates the operation mode of the clock. The values are as follows:
  • 1) free
  • 2) hold
  • 3) trace

Possible Causes

The system clock source is selected for the first time.

Procedure

  • This log message is informational and no action is required.

CLOCK/4/SYS_SW_INNER

Message

CLOCK/4/SYS_SW_INNER:The system source selected switches to 0: Inner clock, and the system clock runs at [STRING] mode.

Description

The clock source is switched from an external clock source to an internal clock source. The log records the operation mode of the system clock.

Parameters

Parameter Name Parameter Meaning

[STRING]

Indicates the operation mode of the clock:
  • 1) free
  • 2) hold

Possible Causes

1. The clock source is lost.

2. If the clock source is changed from the external clock source to the local clock source, this log is generated. It is normal.

Procedure

  • Check whether the upstream device works normally.
  • Check whether the link is normal.
  • Check whether the upstream device transmits clock signal.
  • Run the display clock freq-deviation-detect-range command to view the frequency offset detection range. Check whether the frequency offset of the total received signal is large.
  • Contact technical support personnel.

CLOCK/4/TIME_ADJUST

Message

CLOCK/4/TIME_ADJUST:The time is adjusted. (DistinctAdjustCount=[ULONG], TinyAdjustCount=[ULONG])

Description

The clock board can perform distinct adjustment or fine tune on internal clock. This log is generated only when the clock board performs distinct adjustment. The log records the counts of distinct adjustment and fine tune.

Parameters

Parameter Name Parameter Meaning

[ULONG]

Indicates the distinct adjustment count.

[ULONG]

Indicates the tiny adjustment count.

Possible Causes

1. Generally, jitter occurs during the switchover of clock source. This log is generated when the jitter occurs.

2. The performance of the traced clock source degrades, for example, the time jitter occurs.

Procedure

  • If the clock source is switched, this is a normal situation.
  • If the clock source of the upstream device is switched, this is a normal situation.
  • After the clock source is switched, if the log is generated on all the interfaces of the local device, the clock board of the local device may be faulty. Then perform an active/standby switchover. If the log does not occur, the original active clock board is faulty. You can replace the clock board.
  • Record this log message and contact technical support personnel.

CLOCK/4/TOD_LOCK_FAIL

Message

CLOCK/4/TOD_LOCK_FAIL:The time is locked unsuccessfully.

Description

The time lock condition of the clock board degrades.

Parameters

Parameter Name Parameter Meaning
None. None.

Possible Causes

1. On the clock boards, the number of times the time stamp is adjusted exceeds a certain value.

2. If the time source is changed from the external time source to the local time source, this log is generated. It is normal.

Procedure

  1. Run the display clock mode command to check whether the traced time source is correct, and run the display clock source command to check whether the status of each time source is correct.
  2. If the preceding information is correct, Collect log information and configuration information, and then contact technical support personnel. You can collect diagnostic information using the display diagnostic-information command.

CLOCK/4/TOD_LOCK_SUCC

Message

CLOCK/4/TOD_LOCK_SUCC:The time is locked successfully.

Description

The time lock condition of the clock board is improved.

Parameters

None.

Possible Causes

The external time source is traced successfully.

Procedure

  • This log message is informational and no action is required.

CLOCK/4/TOD_LOS

Message

CLOCK/4/TOD_LOS:The BITS[ULONG] 1pps-tod signal is loss.

Description

The 1pps-tod signal from the BITS input interface is lost.

Parameters

Parameter Name Parameter Meaning

[ULONG]

Indicates the number of the BITS interface:
  • 0: BITS0 input interface
  • 1: BITS1 input interface

Possible Causes

1. The device where the BITS interface resides is faulty.

2. The cable connection between the BITS interface and the local device is abnormal.

Procedure

  1. Run the display clock { bits0 | bits1 } command to check whether the BITS interface is working normally.
  2. Check whether the cable connection is normal.
  3. Check whether the BITS interface sends 1pps-tod signal.
  4. If the preceding information is correct, Collect log information and configuration information, and then contact technical support personnel. You can collect diagnostic information using the display diagnostic-information command.

CLOCK/4/TOD_RECOVER

Message

CLOCK/4/TOD_RECOVER:The BITS[ULONG] 1pps-tod is restored.

Description

The 1pps-tod signal from the BITS input interface is recovered.

Parameters

Parameter Name Parameter Meaning

[ULONG]

Indicates the number of the BITS interface. The values are as follows:
  • 0: BITS0 input interface
  • 1: BITS1 input interface

Possible Causes

The 1pps-tod signal from the BITS input interface recovers.

Procedure

  • This log message is informational and no action is required.

CLOCK/4/TS_ABNORMAL

Message

CLOCK/4/TS_ABNORMAL:The timestamp is abnormal. (MaxPD1588=[LONG], MinPD1588=[LONG])

Description

Transient occurs in the time stamp received from the upstream device. The maximum phase discrimination is greater than 30 or the minimum phase discrimination is smaller than -30. The log records the maximum phase discrimination and the minimum phase discrimination.

Parameters

Parameter Name Parameter Meaning

[LONG]

Indicates the maximum value of phase discrimination.

[LONG]

Indicates the minimum value of phase discrimination.

Possible Causes

1. Generally, jitter occurs during the switchover of clock source. This log is generated when the jitter occurs.

2. The performance of the traced clock source degrades, for example, the time jitter occurs.

Procedure

  • If the clock source is switched, this is a normal situation.
  • If the clock source of the upstream device is switched, this is a normal situation.
  • After the clock source is switched, if the log is generated on all the interfaces of the local device, the clock board of the local device may be faulty. Then perform an active/standby switchover. If the log does not occur, the original active clock board is faulty. You can replace the clock board.
  • Record this log message and contact technical support personnel.

CLOCK/4/TS_NOT_CHG

Message

CLOCK/4/TS_NOT_CHG:The timestamp is not changed. (T1Count=[ULONG], T2Count=[ULONG])

Description

T1 time stamp or T2 time stamp received from the upstream device is not changed. The log records the number of times T1 and T2 time stamps are not changed.

Parameters

Parameter Name Parameter Meaning

[ULONG]

Indicates the number of unchanged T1 time stamps.

[ULONG]

Indicates the number of unchanged T2 time stamps.

Possible Causes

1. An error occurs on the upstream interface that transmits signal. As a result, the time stamps are not updated.

2. The channel for receiving time stamps on the clock source is closed. As a result, the clock source cannot receive the updated time stamps.

Procedure

  1. Run the clock force source command to change the clock source and then check whether this log is generated on all interfaces of the local device.
    • If so, the clock board of the local device is faulty. Perform an active/standby switchover of clock boards and go to step 2.
    • If not, go to step 3.
  2. Check whether this log persists.
    • If so, go to step 3.
    • If not, the alarm handling ends.
  3. Collect log information and configuration information, and then contact technical support personnel. You can collect diagnostic information using the display diagnostic-information command.
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Updated: 2019-04-09

Document ID: EDOC1100065665

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