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Configuration Guide - Device Management

CloudEngine 12800 and 12800E V200R005C10

This document describes the configurations of Device Management, including device status query, hardware management, Information Center Configuration, NTP, Synchronous Ethernet Configuration, Fault Management Configuration, Energy-Saving Management Configuration, Performance Management Configuration, Maintenance Assistant Configuration, and OPS Configuration.
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Importing an External Clock Source

Importing an External Clock Source

Context

An external clock source can provide reference time signals for devices. If the dynamic BMC algorithm is used, you can configure multiple 1588v2 devices to import external clock signals and enable these devices to participate in BMC calculation and then determine the grandmaster clock (GMC). The GMC can provide time signals for the entire 1588v2 network, and other 1588v2 devices need to obtain clock synchronization information from the GMC through 1588v2.

Perform the following steps on the 1588v2 device connected to an external clock source as required.

Procedure

  • Configure a BITS clock source.
    1. Run system-view

      The system view is displayed.

    2. Run clock bits-type [ chassis chassis-id ] bits0 { 2mhz | 2mbps } [ slot slot-id ]

      A signal type is configured for the BITS clock source.

      By default, the signal type for BITS0 clock source is 2mbps.

    3. Run clock source [ chassis chassis-id ] bits0 synchronization enable [ slot slot-id ]

      Clock synchronization is enabled for the BITS clock source.

      By default, clock synchronization is disabled for a BITS clock source.

    4. Run clock source [ chassis chassis-id ] bits0 priority priority-value [ slot slot-id ]

      A priority is configured for the BITS clock source.

      By default, a BITS clock source does not have a priority, indicating that it cannot participate in clock source selection. A smaller priority value indicates a higher priority.

    5. (Optional) Determine the SSM quality level based on the clock signal type.

      • If the clock signal type is 2mbps, run clock sa-bit { sa4 | sa5 | sa6 | sa7 | sa8 } source [ chassis chassis-id ] bits0 [ slot slot-id ]

        The BITS clock source is configured to obtain an SSM quality level from a specified timeslot of clock signals.

        By default, a BITS clock source obtains an SSM quality level from timeslot sa4 of clock signals.

      • If the clock signal type is 2mhz, run clock source [ chassis chassis-id ] bits0 ssm { dnu | prc | sec | ssua | ssub | unk } [ slot slot-id ]

        An SSM quality level is configured for the BITS clock source.

        By default, no SSM quality level is configured for a BITS clock source.

    6. Run clock bits-type [ chassis chassis-id ] bits1 1pps input [ slot slotid ]

      The type of input time signals is set.

      By default, the signal type of the BITS1 clock source is 1 pps, and the signal direction is input.

    7. Run clock tod protocol { ubx | nmea }

      The protocol that Time of Day (TOD) information complies with is configured. TOD information is used when clock signals of the BITS1 clock are transmitted on the network.

      By default, TOD information complies with the Ublox GPS receiver (UBX) protocol.

    8. Run ptp clock-source [ chassis chassis-id ] bits1 on [ slot slot-id ]

      selection

      The switch is configured to use BITS1 signals to select a clock source.

      By default, a BITS clock source does not participate in BMC calculation.

    9. (Optional) Run ptp clock-source [ chassis chassis-id ] bits1 { receive-delay receive-delay-value | send-delay send-delay-value } [ slot slot-id ]

      The delay correction value for time signals on the BITS interface is set.

      By default, the delay correction value for time signals sent or received on a BITS interface is 0.

    10. Run commit

      The configuration is committed.

  • Configure a PTP clock source.
    1. Run system-view

      The system view is displayed.

    2. Run clock source ptp synchronization enable

      Clock synchronization is enabled for the PTP clock source.

      By default, clock synchronization is disabled for a PTP clock source.

    3. Run clock source ptp priority priority-value

      A priority is configured for the PTP clock source.

      By default, a PTP clock source does not have a priority, indicating that it cannot participate in clock source selection. A smaller priority value indicates a higher priority.

    4. (Optional) Run clock source ptp ssm { dnu | prc | sec | ssua | ssub | unk }

      An SSM quality level is set for the PTP clock source.

      By default, no SSM quality level is set for a PTP clock source.

    5. Run commit

      The configuration is committed.

  • Configure a line clock source.
    1. Run system-view

      The system view is displayed.

    2. Run interface interface-type interface-number

      The view of the interface connected to the line clock source is displayed.

    3. Run clock synchronization enable

      Clock synchronization is enabled for the line clock source.

      By default, clock synchronization is disabled for a line clock source.

    4. (Optional) Run clock [ 2msync-1 | 2msync-2 ] priority priority-value

      A priority is configured for the line clock source.

      By default, a line clock source does not have a priority, indicating that it cannot participate in clock source selection. A smaller priority value indicates a higher priority.

    5. (Optional) Run clock ssm { dnu | prc | sec | ssua | ssub | unk }

      An SSM quality level is set for the line clock source.

      By default, the SSM quality level of a line clock source is sent from the remote device.

    6. Run commit

      The configuration is committed.

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Updated: 2019-04-20

Document ID: EDOC1100074722

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