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Atlas 200 Hardware Development Guide 02

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Huawei uses machine translation combined with human proofreading to translate this document to different languages in order to help you better understand the content of this document. Note: Even the most advanced machine translation cannot match the quality of professional translators. Huawei shall not bear any responsibility for translation accuracy and it is recommended that you refer to the English document (a link for which has been provided).
SD/eMMC Interface

SD/eMMC Interface

The eMMC and SD card on the Atlas 200 use the same MMC interface and multiplexed pins. The eMMC and SD card cannot coexist. Only one interconnection mode can be configured for one Atlas 200.

The eMMC controller has the following features:

  • Supports a maximum transmission mode of SDR50. The SD card supports SDR50 too.
  • Supports CPU/DMA (built-in single channel) transfer and linked list access. The DMA transfer supports burst transmission, INCR16/INCR8/INCR4/INCR/SINGLE. BMOD[1]=1'b1 is configured to automatically select the optimal burst mode.
  • Supports the AMBA (AHB/APB) bus interface.
  • Supports command CRC7 and data CRC16 verification.
  • Supports programmable interface clock frequency and GPIO pre-frequency (1-16).
  • Allows the eMMC clock to be disabled in low-power mode.
  • Supports the 1/4/8-bit mode.
  • Supports the write busy function.
  • Supports Single/Multi_Block transmission. Block data transmission can be configured from 1 byte to 65535 bytes.
  • Supports dual-array asynchronous FIFO design (FIFO_DEPTH=256bit, FIFO_WIDTH=32bit), independent RX/TX FIFO, and waterline configuration.
  • Supports FIFO overflow and underflow interrupt alarms to avoid errors during data transmission.

Supports eMMC 4.5. The signal level is 1.8 V, the maximum transmission mode is SDR52, and the clock frequency is 50 MHz.

The SD card has the following features:

  • Supports standard SDIO interfaces, complying with SD 2.0 and SD 3.0.
  • Supports 4-bit parallel data interfaces.
  • Supports a maximum transmission mode of SDR50. The clock frequency is 100 MHz, and the data rate is 50 MB/s (DDR mode is not supported).
  • Supports an interface level is 3.0 V or 1.8 V, adjusting by autonegotiation.

Table 3-5 describes the signal design requirements.

Table 3-5 Signal design requirements

Pin Name

Main Function

Function Description



eMMC data 0. SD card data 0. A 33 Ω resistor has been connected in the module.



eMMC data 1. SD card data 1. A 33 Ω resistor has been connected in the module.



eMMC data 2. SD card data 2. A 33 Ω resistor has been connected in the module.



eMMC data 3. SD card data 3. A 33 Ω resistor has been connected in the module.



eMMC data 4. A 33 Ω resistor has been connected in the module.



eMMC data 5. A 33 Ω resistor has been connected in the module.



eMMC data 6. A 33 Ω resistor has been connected in the module.



eMMC data 7. A 33 Ω resistor has been connected in the module.



SD card detection signal, interrupt signal. By default, the GPIO interrupt mode supports single-edge and dual-edge trigger.

VBUCK8_1V8 is used as the pull-up resistor of the user PCB.



SDIO & eMMC command signal. A 33 Ω resistor has been connected in the module. It is recommended that the 10k Ω pull-up resistor be added, the eMMC interface be pulled up to VBUCK8_1V8, and the SDIO interface be pulled up to LDO9_2V95/1V8.



eMMC or SD card clock. A 33 Ω resistor has been connected in the module.



Perform the strap function during power-on.

The eMMC and SD card mode selection signal, which is configured by the external high and low levels of the module. 0: eMMC, 1: SD.



Ascend 310 MMC interface level input. There is a jumper resistor outside the module. LDO9_2V95/1V8 is connected in the SD card mode and VBUCK8_1V8 is connected in the eMMC mode.

When the I/O of the MMC interface is used, the power supply must be connected. If the MMC interface is not used, connect to VBUCK8_1V8.



eMMC power VCC, 3 V output, 400 mA.



SD card interface level output in the SD card mode. 1.8 V/3 V is supported.



SD card power VCC, 3 V output, 800 mA.



eMMC VCCQ power VCC, 1.7 V to 1.8 V output, 260 mA.

The power supply is the I/O interface power of the Ascend 310. It can be used as the pull-up power supply of the interface.


The CMD and DATA signals have been pulled up in the chip. The pull-up resistor is about 29 kΩ to 45 kΩ (typical value: 35 kΩ). When the CMD signal is used as the Open Drain IO in enumeration mode, forcible pull-up is required. (The protocol requires 4.7 kΩ to 100 kΩ). The chip does not have forcible pull-up resistors. Therefore, it is recommended that a 10 kΩ pull-up resistor be added to board output signals, but do not need to add pull-up resistors to board data signals.)

Updated: 2019-07-29

Document ID: EDOC1100079542

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