No relevant resource is found in the selected language.

This site uses cookies. By continuing to browse the site you are agreeing to our use of cookies. Read our privacy policy>Search

Reminder

To have a better experience, please upgrade your IE browser.

upgrade

Atlas 200 Hardware Development Guide 03

Rate and give feedback:
Huawei uses machine translation combined with human proofreading to translate this document to different languages in order to help you better understand the content of this document. Note: Even the most advanced machine translation cannot match the quality of professional translators. Huawei shall not bear any responsibility for translation accuracy and it is recommended that you refer to the English document (a link for which has been provided).
SD/eMMC Port

SD/eMMC Port

The eMMC and SD card on the Atlas 200 use the same MMC port and pins. The eMMC and SD card are mutually exclusive. Only one interconnection mode can be configured for one Atlas 200.

The eMMC controller has the following features:

  • Supports transmission speeds of up to SDR50 for SD cards and eMMC.
  • Supports CPU/DMA transfer (embedded single channel) and linked list access.
  • Supports the AMBA (AHB/APB) bus port.
  • Supports command CRC7 and data CRC16.
  • Supports programmable port clock frequency and GPIO pre-frequency (1-16).
  • Allows the eMMC clock to be disabled in low-power mode.
  • Supports the 1/4/8-bit mode.
  • Supports write busy.
  • Supports single-block and multi-block transmission. The data block is configurable from 1 to 65535 bytes.
  • Supports dual-array asynchronous FIFO design (FIFO_DEPTH = 256 bits, FIFO_WIDTH = 32 bits), independent RX/TX FIFO, and waterline configuration.
  • Supports FIFO overflow and underflow interrupt alarms to prevent errors during data transmission.

Supports eMMC 4.5. The signal level is 1.8 V, the maximum transmission mode is SDR52, and the clock frequency is 50 MHz.

The specifications of the SD card port are as follows:

  • Supports standard SDIO port, complying with SD 2.0 and SD 3.0.
  • Supports 4-bit parallel data port.
  • Supports transmission modes of up to SDR50, with clock frequency of 100 MHz and data rate of 50 MB/s (DDR mode is not supported).
  • Supports the port level of 3.0 V or 1.8 V, adjusting by autonegotiation.
  • Industrial microSD cards are recommended based on the ambient temperature and reliability requirements.
  • The microSD card uses the flash memory. The NAND flash memory is widely used in the industry. The NAND flash memory stores data by holding electrical charge in the floating gate. After electrons pass through the floating gate repeatedly, the storage capability of the floating gate is weakened. If the floating gate is broken down, data cannot be stored. Therefore, before using a NAND flash memory, evaluate the data write volume of the application to prevent component failures caused by wear-out of the NAND flash memory.
  • For details about the application scenarios of the SD card, see the SD Card Technical White Paper.

Signal Design Requirements

Table 3-5 Signal design requirements

Pin Name

Function

Description

SD_EMMC_DATA0

DATA0

eMMC data 0; SD card data 0; a 33Ω resistor is connected in series on the Atlas 200.

SD_EMMC_DATA1

DATA1

eMMC data 1; SD card data 1; a 33Ω resistor is connected in series on the Atlas 200.

SD_EMMC_DATA2

DATA2

eMMC data 2; SD card data 2; a 33Ω resistor is connected in series on the Atlas 200.

SD_EMMC_DATA3

DATA3

eMMC data 3; SD card data 3; a 33Ω resistor is connected in series on the Atlas 200.

EMMC_DATA4

DATA4

eMMC data 4; a 33Ω resistor is connected in series on the Atlas 200.

EMMC_DATA5

DATA5

eMMC data 5; a 33Ω resistor is connected in series on the Atlas 200.

EMMC_DATA6

DATA6

eMMC data 6; a 33Ω resistor is connected in series on the Atlas 200.

EMMC_DATA7

DATA7

eMMC data 7; a 33Ω resistor is connected in series on the Atlas 200.

SD_DETECT/GPIO3

GPIO3

SD card detection signal, interrupt signal. By default, the GPIO interrupt supports single- and dual-edge triggering.

The pull-up resistor on the user PCB uses VBUCK8_1V8.

SD_EMMC_CMD

CMD

SDIO&eMMC command signal. A 33Ω resistor is connected in series on the Atlas 200. You are advised to connect a 10kΩ pull-up resistor to VBUCK8_1V8 for an eMMC port or to LDO9_2V95/1V8 for an SDIO port.

SD_EMMC_CLK

CLK

eMMC or SD card clock. A 33Ω resistor is connected in series on the Atlas 200.

SPI2_MOSI/EMMC_SD_SEL

EMMC_SD_SEL

Strap function during power-on.

The eMMC and SD card mode selection signal, which is determined by the external high and low levels of the Atlas 200. 0: EMMC; 1: SD.

VIO_MMC

-

Ascend 310 MMC port level input. There is a jumper resistor outside the Atlas 200. LDO9_2V95/1V8 is connected in the SD card mode, and VBUCK8_1V8 is connected in the eMMC mode.

When the MMC port is used, power supply must be connected. If the MMC port is not used, connect it to VBUCK8_1V8.

LDO15_2V95

-

eMMC power VCC, 3 V output, 400 mA.

LDO9_2V95/1V8

-

SD card port level output in the SD card mode. 1.8 V and 3 V are supported.

CAUTION:

One capacitor is installed close to the pin. When the pin is connected to VIO_MMC in SD card, the total capacitance of the link must be less than or equal to 1 μF.

LDO16_2V95

-

SD card power VCC, 3 V output, 800 mA.

VBUCK8_1V8

-

eMMC VCCQ power supply, 1.7 V to 1.8 V output, 260 mA.

The power supply is that of the I/O port on the Ascend 310. It can be used as the pull-up power supply of the port.

SD/eMMC Port Level Attributes

Table 3-6 SD/eMMC port level parameters (1.8 V)

Parameter

Symbol

Minimum Value

Typical Value

Maximum value

Unit

Input low level

Vil

-0.3

-

0.58

V

Input high level

Vih

1.27

-

1.98

V

Threshold

Vt

0.84

0.93

1.02

V

Internal pull-up resistor

Rpu

29k

35k

45k

ohm

Internal pull-down resistor

Rpd

24k

28k

33k

ohm

Output low level

Vol

-

-

0.45

V

Output high level

Voh

1.4

-

-

V

Table 3-7 SD/eMMC port level parameters (2.95 V, VDDIO voltage range: 2.7 V to 3.465 V)

Parameter

Symbol

Minimum Value

Typical Value

Maximum value

Unit

Input low level

Vil

-0.3

-

0.25*VDDIO

V

Input high level

Vih

0.625*VDDIO

-

3.465

V

Threshold

Vt

0.88

1.05

1.31

V

Internal pull-up resistor

Rpu

31k

42k

66k

ohm

Internal pull-down resistor

Rpd

24k

29k

33k

ohm

Output low level

Vol

-

-

0.125*VDDIO

V

Output high level

Voh

0.75*VDDIO

-

-

V

The CMD and DATA signals already have a pull-up in the chip. The pull-up resistor is about 29 kΩ to 45 kΩ (typical value: 35 kΩ). When the CMD signal is used as the Open Drain IO in enumeration mode, forced pull-up (4.7 kΩ to 100 kΩ requested by the protocol) is required. There is no forced pull-up in the chip. Therefore, a 10 kΩ pull-up resistor is recommended to add to board output signals. No additional pull-up resistor is required for board data signals.

Translation
Download
Updated: 2019-11-18

Document ID: EDOC1100079542

Views: 4310

Downloads: 53

Average rating:
This Document Applies to these Products
Related Version
Related Documents
Share
Previous Next