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Atlas 200 Hardware Development Guide 03

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Huawei uses machine translation combined with human proofreading to translate this document to different languages in order to help you better understand the content of this document. Note: Even the most advanced machine translation cannot match the quality of professional translators. Huawei shall not bear any responsibility for translation accuracy and it is recommended that you refer to the English document (a link for which has been provided).
RGMII Interface

RGMII Interface

Table 4-2 PCB design requirements

Item

Design Requirement

Description

PCB routing impedance

40 ohm to 50 ohm.

-

Source end matching

22 ohm to 33 ohm.

The RX matches the TX source end. The resistance can be optimized based on the simulation and test results.

Routing length

< 15 inches.

-

Reference plane

Ground plane, no cross-plane splits.

-

Timing constraint 1

The peer chip has the delay function.

The length of TXdata is the same as that of TXclk, using a clock as the reference. The length deviation is ±100 mil.

The length of RXdata is the same as that of RXclk, using a clock as the reference. The length deviation is ±100 mil.

The Atlas 200 does not support the delay function.

Timing constraint 2

The peer chip does not support the delay function.

The length of TXclk is XX inch (calculated based on the timing parameters of the chip) longer than that of TXdata. The length deviation is 200 mil.

The length of RXclk is XX inch (calculated based on the timing parameters of the chip) longer than that of RXdata. The length deviation is 200 mil.

The Atlas 200 does not support the delay function.

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Updated: 2019-11-18

Document ID: EDOC1100079542

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