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TaiShan Server BIOS Parameter Reference (Kunpeng 920 Processor) 21
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MISC Config

MISC Config

This section describes how to configure the items commonly used on the MISC Config screen.

On the MISC Config screen, you can configure miscellaneous settings, such as the system debug level. 1, Figure 4-26, Figure 4-27, or Figure 4-28 shows the MISC Config screen. Table 4-18 describes the parameters on the screen.

The MISC Config screen varies according to the server or BIOS version. For details, see Table 4-18.

Figure 4-25 MISC Config screen 1
Figure 4-26 MISC Config screen 2
Figure 4-27 MISC Config screen 3

Figure 4-28 MISC Config screen 4
Table 4-18 Parameters on the MISC Config screen

Parameter

Description

Default Value

Support Smmu

Sets whether to support the SMMU function. The options are as follows:

  • Enabled
  • Disabled
NOTICE:

If the server is configured with an Avago SAS3408iMR, Avago SAS3416iMR, or Avago MegaRAID SAS 9440-8i RAID controller card, set this parameter to Disabled.

Disabled

NOTE:

The default value of this parameter varies depending on the server or BIOS version.

Smmu Work Around

Enables or disables the SMMU workaround. The options are as follows:

  • Enabled: The SMMU workaround is enabled.
    NOTE:

    When the SMMU workaround is enabled, the enabling status of the SMMU function is the same as that of Support Smmu.

  • Disabled: The SMMU workaround is disabled.
    NOTE:

    When the SMMU workaround is disabled, the SMMU function is forcibly disabled only when the server is configured with an Avago SAS3408iMR, Avago SAS3416iMR, or Avago MegaRAID SAS 9440-8i RAID controller card. In this case, Support Smmu is automatically set to Disabled.

Disabled

Support GOP FB for SM750

Enables or disables the GOP frame buffer area of the SM750. The options are as follows:

  • Enabled
  • Disabled

Enabled

Support SPCR

Enables or disables the Serial Port Console Redirection (SPCR) Table. The options are as follows:

  • Enabled: The OS print information is output from the VGA port and serial port.
  • Disabled: The OS print information is output from the VGA port.

Enabled

System Debug Level

Sets the system debug level. This parameter controls debug information to be sent in the phase. The options are as follows:

  • Disable: Minimal debug information is sent in the POST phase, and the system startup time is short.
  • Debug: All debug information is provided over the serial port in the POST process. The system startup time is longer.

Debug

Memory Print Level

Specifies the level of memory reference code (MRC) messages to be displayed. The options are as follows:

  • Disable: disables the function.
  • Minimum: MRC messages of the low level are displayed.
  • Minmax: MRC messages of the medium level are displayed.
  • Maximum: MRC messages of the high level are displayed.
NOTE:

This parameter is unavailable when System Debug Level is set to Disable.

Minimum

CPU Prefetching Configuration

Enables or disables CPU prefetching. The options are as follows:

  • Enabled
  • Disabled

Enabled

Adaptive Prefetch

Enables or disables adaptive prefetch. The options are as follows:

  • Enabled
  • Disabled
NOTE:

This parameter is displayed and takes effect only when CPU Prefetching Configuration is set to Enable.

Disabled

Support Down Core
Indicates the number of CPU cores to be disabled. The options are as follows:
  • Disabled: disables all cores.
  • 1: disables one fourth of all cores.
  • 2: disables two fourths of all cores.
  • 3: disables third fourths of all cores.

Disabled

Dmi Vendor Change

Enables or disables the function of changing the manufacturer name. The options are as follows:

  • Enabled
  • Disabled

Disabled

SPE

Enables or disables the Statistical Profiling Extension (SPE) function. The options are as follows:

  • Enabled
  • Disabled
NOTE:

Only the BIOSs on the following servers support this parameter:

  • BIOS V159 and later on TaiShan 200 servers (models 2280, 5280, and 2180)
  • BIOS V169 and later on TaiShan 200 servers (model 2280E)
  • BIOS V168 and later on TaiShan 200 servers (model 1280)
  • All BIOS versions on TaiShan 200 servers (models 2280VE, 5280VE, 2480, 5290, and 5180)
  • All BIOS versions on TaiShan 200 Pro servers (models 2480, 2280, and 1280)

Disabled

Support 40Bit

Enables or disables the 40Bit function. Value:

  • Enabled
  • Disabled
NOTE:
  • This parameter is unavailable when Skt Interleaving is set to Enable.
  • After this function is enabled:
    • The total memory capacity of a single CPU cannot exceed 256 GB. That is, the total memory capacity of a 2-socket system cannot exceed 512 GB.
    • The memory must be configured based on the recommended server installation method.
    • The server does not support the Packet Order Enforce (POE) feature.
  • Only the BIOSs on the following servers support this parameter:
    • BIOS V163 on TaiShan 200 servers (models 2280 and 5280), BIOS V332 on TaiShan 200 servers (model 5290), and later versions
    • All BIOS versions on TaiShan 200 servers (models 2280VE and 5280VE)
    • All BIOS versions on TaiShan 200 Pro servers (model 2280)

Disabled

Support 44Bit

Enables or disables the 44Bit function. After this function is enabled, the memory address mapping is changed to 16 TB or less to adapt to the WX9100 video card. The options are as follows:

  • Enabled
  • Disabled
NOTE:
  • This parameter is unavailable when Skt Interleaving is set to Enable.
  • The Support 44Bit and Support 40Bit functions cannot take effect at the same time. When these two functions are enabled at the same time, only the Support 40Bit function takes effect, and the memory address mapping is changed to 1 TB or less.
  • The Support 44Bit function restricts the memory address mapping. Therefore, you are advised to install the memory based on the recommended method.
  • This parameter is supported only by BIOS V176 and later on TaiShan 200 servers (models 2280 and 5280).

Disabled

Type2 Version Custom Control

Enables or disables the function of customizing the SMBIOS Type 2 Version field. Value:

  • Enabled
  • Disabled
NOTE:

Only the BIOSs on the following servers support this parameter:

  • BIOS V163 and later on TaiShan 200 servers (models 2280, 5280, 2180, and 1280)
  • BIOS V169 and later on TaiShan 200 servers (model 2280E)
  • BIOS V316 and later on TaiShan 200 servers (models 2280VE, 5280VE, and 2480)
  • All BIOS versions on TaiShan 200 servers (model 5290)
  • All BIOS versions on TaiShan 200 servers (model 5180)
  • All BIOS versions on TaiShan 200 Pro servers (models 2480, 2280, and 1280)

Disabled

Support L2PMU

Enables or disables ACTLR_EL2 L2PMU and ACTLR_EL3 L2PMU. The options are as follows:

  • Enabled
  • Disabled
NOTE:

Only the BIOSs on the following servers support this parameter:

  • BIOS V170 and later on TaiShan 200 servers (models 2280, 5280, 2180, and 1280)
  • BIOS V172 and later on TaiShan 200 servers (model 2280E)
  • All BIOS versions on TaiShan 200 servers (model 5180)
  • All BIOS versions on TaiShan 200 Pro servers (model 1280)

Disabled

Type4 Socket Designation Control

Controls the CPU name bit width of SMBIOS Type4 by enabling or disabling this parameter. If this parameter is enabled, the Socket Designation of the processor information is displayed as CPU1 and CPU2. If this parameter is disabled, CPU01 and CPU02 are displayed. The options are as follows:

  • Enabled
  • Disabled
NOTE:

Only the BIOSs on the following servers support this parameter:

  • BIOS V173 and later on TaiShan 200 servers (models 2280, 5280, 2280E, 2180, 5180, and 1280)
  • All BIOS versions on TaiShan 200 Pro servers (model 1280)

Disabled

Slit Table Version

Selected SLIT table version. The options are as follows:

  • Version1
  • Version2
  • Version3
NOTE:

Only the BIOSs on the following servers support this parameter:

  • BIOS V173 and later on TaiShan 200 servers (models 2280, 5280, 2280E, 2180, 5180, and 1280)
  • BIOS V322 and later on TaiShan 200 servers (models 2280VE, 5280VE, and 5290)
  • All BIOS versions on TaiShan 200 Pro servers (models 2280 and 1280)

Version2

Memory Pre-Alloc

Enables or disables the memory pre-allocation. After this function is enabled, memory fragments can be reduced. The options are as follows:

  • Disable
  • Enable
NOTE:

Only the BIOSs on the following servers support this parameter:

  • BIOS V175 and later on TaiShan 200 servers (models 1280, 2180, 2280, 2280E, 5280, and 5180)
  • BIOS V322 and later on TaiShan 200 servers (models 2280VE, 5280VE, 5290, and 2480)
  • All BIOS versions on TaiShan 200 Pro servers (models 2480, 2280, and 1280)

Disable

Customized Features

Specifies whether to show IPv4 PXE Support, IPv6 PXE Support, and PXE Boot Capability. The options are as follows:

  • Disabled: hides IPv4 PXE Support and IPv6 PXE Support and shows PXE Boot Capability.
  • NFV Feature: shows IPv4 PXE Support and IPv6 PXE Support and hides PXE Boot Capability.
    NOTE:

    This parameter is supported by BIOS V182 and later on TaiShan 200 servers (models 1280, 2180, 2280, 5280, 5180, and 2280E) and all BIOS versions on TaiShan 200 Pro servers (model 1280).

Disabled

SPD CRC Optimization

Enables or disables memory SPD CRC optimization. The options are as follows:

  • Disable
  • Enable

Enable

Accelerators Status

Indicates the accelerator status.

-

TPM Device ACPI Format

Enables or disables the ACPI format of the TPM device. The options are as follows:

  • NoHID
  • HID
NOTE:

This parameter is supported by BIOS V188 and later on TaiShan 200 servers (models 1280, 2180, 2280, 5280, 5180, and 2280E).

NoHID

Kaslr Support
NOTE:

When TaiShan 2280/5280 (1620), TaiShan 2280/5280 (VE) (1620/1620S), and TaiShan 2280 pro (1620/1620S) have BBUs installed, this option is provided and its default value is disabled.

Disabled

Mellanox PXE Control

Enables or disables Mellanox NIC control.

NOTE:

This parameter is not supported by TaiShan 200 servers (model 2480) or TaiShan 200 Pro servers (model 2480).

-

Figure 4-29 shows the Accelerators Status screen. Table 4-19 describes the parameters.

Figure 4-29 Accelerators Status screen
Table 4-19 Parameters on the Accelerators Status screen

Parameter

Description

Status

SEC(SM3/SM4/AES/DES/MD5/HMAC)

Indicates the SEC accelerator status.

Not Install

HPRE(RSA1024-RSA4096/DH)

Indicates the HPRE accelerator status.

Not Install

RDE(EC/FlexEC/RAID5 XOR/RAID6 P+Q)

Indicates the RDE accelerator status.

Not Install

ZIP(DEFLATE(GZIP/ZLIB))

Indicates the ZIP accelerator status.

Not Install

If the server has been configured with an accelerator card, the status is Install.

Figure 4-30 shows the Mellanox PXE Control screen. Table 4-20 describes the parameters.

This parameter is not supported by TaiShan 200 servers (model 2480) or TaiShan 200 Pro servers (model 2480).

Figure 4-30 Mellanox PXE Control screen
Table 4-20 Parameters on the Mellanox PXE Control screen

Parameter

Description

Default Value

Mellanox CX-5 PXE 1

Enables or disables Mellanox CX-5 network port 1. The options are as follows:

  • Enable
  • Disable

Enable

Mellanox CX-5 PXE 2

Enables or disables Mellanox CX-5 network port 2. The options are as follows:

  • Enable
  • Disable

Enable
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Updated: 2023-03-22

Document ID: EDOC1100088647

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