The engineers check MPU entry through disp fib statistics and FIB entry of n slot through disp fib n statistics and it is short of 200,000 lists. Attached service is abnormal and there is loop on direct device.
Restart the machine and previous FIB of interface baord can be cleared. When MPU floods FIB to interface board, the service is normal.
MPU distributes FIB to interface board. Normally when the route of single link flaps, FIB of MPU and interface board is inconsistent.
When there is much route flapping, there is frequent master/slave switchover. FIB on interface board has not finished aging, it receives FIB flooded by MPU. There is great difference in FIB.