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Intermittent oscillation of the 2M crystal oscillator causes PQ1 to report the CHIP_FAIL and E1LOC alarms

Publication Date:  2019-07-04 Views:  121 Downloads:  0

Issue Description

The PQ1 board in slot 13 of a set of OSN 3500 reports the CHIP_FAIL and E1LOC alarms, and the services involved are interrupted, but can recover upon cold reset of the PQ1 board in slot 13. The NE version is
13    CHIP_FAIL             MJ          end         
2007-6-29 17:1:47    2007-6-29 18:40:9    0x01   0x00   0x0f   0xff   0xff                        
13    E1LOC                   MJ          end  
       2007-6-29 17:1:48    2007-6-29 18:40:9    0x01   0x00   0x01   0xff   0x01        

Alarm Information


Handling Process

A cold reset on the PQ1 board makes the 2M crystal oscillator restart. Then, normal clock signals are provided, the alarm disappears and the service is recovered. There is little probability that the 2M crystal oscillator stops oscillating intermittently. Moreover, the production department adds the ASFT test (aging screening for high temperature) in January 2007 to reinforce the temperature test stress and screen the early failing boards. Meanwhile, service test is configured to improve the screening ratio of failure boards. Thus, the 2M crystal oscillators that have potential problems cannot be used in networks.
If the 2M crystal oscillator stops working on the site, it is advised to replace it with the board produced and delivered in January 2007       

Root Cause

CHIP_FAIL is an alarm indicating failure of an important chip. PARA[0] and PARA[1] represent the number of the failing chip, and PARA[2] and PARA[3] represent the number of clock-type failure. The PARA[2] of the CHIP_FAIL above is 0f, indicating the SA527 chip detects loss of its 2M master clock (namely the MCLK clock), and PARA[3] is 0xff, indicating all the eight pieces of SA527 of the PQ1 board detect loss of the MCLK clock, so the 2M clock of the PQ1 board has deteriorated, and the 2M crystal oscillator stops oscillating.
The E1LOC alarm is detected by SD538. SD538 tests the 2M clock extracted from the service sent by SA527. If the 2M master clock of SA527 is lost, it is impossible to extract clock from the service. Therefore SD538 reports E1LOC.