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CX916, CX916L, CX930 交换模块 V100R001 诊断命令参考 04

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display fei fe port dump interface

display fei fe port dump interface

命令功能

display fei fe port dump interface命令用来查看端口相关的寄存器信息。

说明:
仅CE6870EI和CE6875EI支持该命令。

命令格式

display fei fe port dump interface interface-type interface-number

参数说明

参数 参数说明 取值
interface-type interface-number
指定端口的类型和编号,其中:
  • interface-type表示端口类型。
  • interface-number表示端口编号。
根据设备实际情况选择。

视图

诊断视图

缺省级别

3:管理级

使用指南

使用实例

# 查看端口相关的寄存器信息。

<HUAWEI> system-view
[~HUAWEI] diagnose
[~HUAWEI-diagnose] display fei fe port dump interface 10ge 4/0/2
Unit=1, Port=3

*****************************************************************
*           E X T   P H Y   R E G I S T E R   D U M P           *
*                                                               *
*****************************************************************

 phy reg info :
 Addr 1.0000 = 0x2840 (PMA/PMD Control 1 Reg)
 Addr 1.0001 = 0x0082 (PMA/PMD Status 1 Reg)
 Addr 1.0002 = 0x0342 (PMA/PMD Device Ide0 Reg)
 Addr 1.0003 = 0x90a1 (PMA/PMD Device Id1 Reg)
 Addr 1.0004 = 0x0001 (PMA/PMD Speed Ability Reg)
 Addr 1.0005 = 0x001a (PMA/PMD Devices In Package 1 Reg)
 Addr 1.0006 = 0x0000 (PMA/PMD Devices In Package 2 Reg)
 Addr 1.0007 = 0x0007 (10G PMA/PMD Control 2 Reg)
 Addr 1.0008 = 0xbd81 (10G PMA/PMD Status 2 Reg)
 Addr 1.0009 = 0x0000 (10G PMD Transmit Disable Reg)
 Addr 1.000a = 0x0000 (10G PMA/PMD Receive Signal Detect Reg)
 Addr 1.000b = 0x0000 (10G PMA/PMD Extended Ability Reg)
 Addr 1.000e = 0x0000 (10G PMA/PMD Package Id0 Reg)
 Addr 1.000f = 0x0000 (10G PMA/PMD Package Id1 Reg)

 Addr 3.0000 = 0x2040 (PCS Control 1 Reg)
 Addr 3.0001 = 0x0082 (PCS Status 1 Reg)
 Addr 3.0002 = 0x0342 (PCS Device Id0 Reg)
 Addr 3.0003 = 0x90a1 (PCS Device Id1 Reg)
 Addr 3.0004 = 0x0001 (PCS Speed Ability Reg)
 Addr 3.0005 = 0x001a (PCS Devices In Package 1 Reg)
 Addr 3.0006 = 0x0000 (PCS Devices In Package 2 Reg)
 Addr 3.0007 = 0x0000 (10G PCS control 2 Reg)
 Addr 3.0008 = 0x8401 (10G PCS Status 2 Reg)
 Addr 3.000e = 0x0000 (PCS Package Id0 Reg)
 Addr 3.000f = 0x0000 (PCS Package Id1 Reg)
 Addr 3.0018 = 0x0000 (10GBASE-X PCS Status Reg)
 Addr 3.0019 = 0x0000 (10GBASE-X PCS Test Control Reg)
 Addr 3.0020 = 0x000c (10GBASE-R PCS Status 1 Reg)
 Addr 3.0021 = 0x0000 (10GBASE-R PCS Status 2 Reg)
 Addr 3.0022 = 0xaaaa (10GBASE-R PCS Test Pattern Seed A Reg)
 Addr 3.0023 = 0xaaaa (10GBASE-R PCS Test Pattern Seed A Reg)
 Addr 3.0024 = 0xaaaa (10GBASE-R PCS Test Pattern Seed A Reg)
 Addr 3.0025 = 0x02aa (10GBASE-R PCS Test Pattern Seed A Reg)
 Addr 3.0026 = 0xaaaa (10GBASE-R PCS Test Pattern Seed B Reg)
 Addr 3.0027 = 0xaaaa (10GBASE-R PCS Test Pattern Seed B Reg)
 Addr 3.0028 = 0xaaaa (10GBASE-R PCS Test Pattern Seed B Reg)
 Addr 3.0029 = 0x02aa (10GBASE-R PCS Test Pattern Seed B Reg)
 Addr 3.002a = 0x0000 (10GBASE-R PCS Test Pattern Control Reg)
 Addr 3.002b = 0x0000 (10GBASE-R PCS Test Pattern Error counter Reg)
 Addr 3.c000 = 0x0000 (PCS System Loopback Control Reg)
 Addr 3.c403 = 0x0005 (XFI SerDes status Reg)
 Addr 1.c32e = 0x0000 (SFI CRC Counter Reg)
 Addr 1.c32f = 0x0000 (SFI PKT Counter Reg)
 Addr 1.c33e = 0x0000 (XFI CRC Counter Reg)
 Addr 1.c33f = 0x0000 (XFI PKT Counter Reg)

 Addr 4.0000  = 0x2040 (PHY XS Control 1 Reg)
 Addr 4.0001  = 0x0082 (PHY XS Status 1 Reg)
 Addr 4.0002  = 0x0342 (PHY XS Device Id0 Reg)
 Addr 4.0003  = 0x90a1 (PHY XS Device Id1 Reg)
 Addr 4.0004  = 0x0001 (PHY XS Speed Ability Reg)
 Addr 4.0005  = 0x001a (PHY XS Devices In Package1 Reg)
 Addr 4.0006  = 0x0000 (PHY XS Devices In Package2 Reg)
 Addr 4.0008  = 0x8800 (PHY XS Status 2 Reg)
 Addr 4.000e  = 0x0000 (PHY XS Package Id0 Reg)
 Addr 4.000f  = 0x0000 (PHY XS Package Id1 Reg)
 Addr 4.0018  = 0x0c00 (PHY XS Lane Status Reg)
 Addr 4.0019  = 0x0000 (PHY XS 10GBASE-X Test Control Reg)
 Addr 4.c000  = 0x0000 (PHY XS System Loopback Control Reg)

 Some Special Registers For Debugging:
 Addr 1.c243  = 0x17e1 (SFI TX Pre-emphasis Reg)
 Addr 1.c246  = 0x0181 (SFI TX mode Reg)
 Addr 1.c2f1  = 0x581f (XFI RX EQ/OFFSET Reg)
 Addr 1.c2e8  = 0x0000 (CDR offset Reg)
 Addr 1.c2c3  = 0x00ff (XFI TX Pre-emphasis enable Reg)
 Addr 1.c2ca  = 0x7e00 (XFI TX Pre-emphasis Reg)
 Addr 1.c018  = 0x0000 (SFI PRBS Control Reg)
 Addr 1.c003  = 0x0101 (SFI PRBS Check Reg)
 Addr 1.c360  = 0x0010 (XFI PRBS Enable Reg)
 Addr 1.c361  = 0x0000 (XFI PRBS Control Reg)
 Addr 1.c340  = 0x0008 (XFI PRBS Check Enable Reg)
 Addr 1.c341  = 0x0000 (XFI PRBS Check Control Reg)
 Addr 1.c342  = 0x0000 (XFI PRBS Check Errcnt Reg)
 Addr 1.c220  = 0x0000 (Unretimed SGMII Mode Control Reg)
 Addr 1.c088  = 0x0008 (Speed Mode Control Reg)
 Addr 1.d03b  = 0x0017 (PHY FM Check Reg1)
 Addr 1.d03d  = 0x90e6 (PHY FM Check Reg2)

*****************************************************************
*           I N T   P H Y   R E G I S T E R   D U M P           *
*                                                               *
*****************************************************************

 phy reg info :
---- Block = 0x8000  Offset = 0x10 ~ 0x1f ----
    0x10 = 0x2c2f     0x11 = 0x8b08     0x12 = 0x0707     0x13 = 0xbcbc
    0x14 = 0x1c1c     0x15 = 0xfbfd     0x16 = 0xfe7c     0x17 = 0x0410
    0x18 = 0xa040     0x19 = 0x0010     0x1a = 0x9c00     0x1b = 0x0001
    0x1c = 0xa000     0x1d = 0x400f     0x1e = 0x0000     0x1f = 0x8000

---- Block = 0x8010  Offset = 0x10 ~ 0x1f ----
    0x10 = 0xce00     0x11 = 0x0000     0x12 = 0x0000     0x13 = 0x0080
    0x14 = 0x0000     0x15 = 0x0000     0x16 = 0x0000     0x17 = 0x0000
    0x18 = 0x0000     0x19 = 0x0000     0x1a = 0x0000     0x1b = 0x0000
    0x1c = 0x0000     0x1d = 0x0000     0x1e = 0x0000     0x1f = 0x8010

---- Block = 0x8050  Offset = 0x10 ~ 0x1f ----
    0x10 = 0xff0a     0x11 = 0xd006     0x12 = 0x02ff     0x13 = 0x0cff
    0x14 = 0x00ff     0x15 = 0x0400     0x16 = 0x0000     0x17 = 0xff00
    0x18 = 0x6b4a     0x19 = 0x0000     0x1a = 0x0000     0x1b = 0x8000
    0x1c = 0x0016     0x1d = 0x0000     0x1e = 0x0077     0x1f = 0x8050

---- Block = 0x80b0  Offset = 0x10 ~ 0x1f ----
    0x10 = 0x0c00     0x11 = 0x1c40     0x12 = 0x0000     0x13 = 0x0000
    0x14 = 0x6520     0x15 = 0x0000     0x16 = 0x0000     0x17 = 0x0000
    0x18 = 0x0000     0x19 = 0x0080     0x1a = 0x0000     0x1b = 0x7810
    0x1c = 0x0010     0x1d = 0x0000     0x1e = 0xe800     0x1f = 0x80b0

---- Block = 0x80c0  Offset = 0x10 ~ 0x1f ----
    0x10 = 0x9c00     0x11 = 0x1c40     0x12 = 0x0000     0x13 = 0x0000
    0x14 = 0x6520     0x15 = 0x0000     0x16 = 0x0000     0x17 = 0x0000
    0x18 = 0x0000     0x19 = 0x0080     0x1a = 0x0000     0x1b = 0x8014
    0x1c = 0x0010     0x1d = 0x0000     0x1e = 0xe800     0x1f = 0x80c0

---- Block = 0x80d0  Offset = 0x10 ~ 0x1f ----
    0x10 = 0x0000     0x11 = 0x1c40     0x12 = 0x0000     0x13 = 0x0000
    0x14 = 0x6520     0x15 = 0x0000     0x16 = 0x0000     0x17 = 0x0000
    0x18 = 0x0000     0x19 = 0x0080     0x1a = 0x0000     0x1b = 0x7810
    0x1c = 0x0010     0x1d = 0x0000     0x1e = 0xe800     0x1f = 0x80d0

---- Block = 0x80e0  Offset = 0x10 ~ 0x1f ----
    0x10 = 0x0c00     0x11 = 0x1c40     0x12 = 0x0000     0x13 = 0x0000
    0x14 = 0x6520     0x15 = 0x0000     0x16 = 0x0000     0x17 = 0x0000
    0x18 = 0x0000     0x19 = 0x0080     0x1a = 0x0000     0x1b = 0x7810
    0x1c = 0x0010     0x1d = 0x0000     0x1e = 0xe800     0x1f = 0x80e0

---- Block = 0x80f0  Offset = 0x10 ~ 0x1f ----
    0x10 = 0x9c00     0x11 = 0x1c40     0x12 = 0x0000     0x13 = 0x0000
    0x14 = 0x6520     0x15 = 0x0000     0x16 = 0x0000     0x17 = 0x0000
    0x18 = 0x0000     0x19 = 0x0080     0x1a = 0x0000     0x1b = 0xf814
    0x1c = 0x0010     0x1d = 0x0000     0x1e = 0xe800     0x1f = 0x80f0

---- Block = 0x8100  Offset = 0x10 ~ 0x1f ----
    0x10 = 0x08e4     0x11 = 0x00e4     0x12 = 0x009c     0x13 = 0x0200
    0x14 = 0x8091     0x15 = 0x0000     0x16 = 0x0000     0x17 = 0x0000
    0x18 = 0x0000     0x19 = 0x0000     0x1a = 0x0000     0x1b = 0x0000
    0x1c = 0x0000     0x1d = 0x0064     0x1e = 0x0809     0x1f = 0x8100

---- Block = 0x8120  Offset = 0x10 ~ 0x1f ----
    0x10 = 0x0000     0x11 = 0x8b08     0x12 = 0xf02b     0x13 = 0x0000
    0x14 = 0x0000     0x15 = 0x0000     0x16 = 0x0000     0x17 = 0x0000
    0x18 = 0x0000     0x19 = 0x0000     0x1a = 0x0000     0x1b = 0x0000
    0x1c = 0x0000     0x1d = 0x0000     0x1e = 0x0000     0x1f = 0x8120

---- Block = 0x8130  Offset = 0x10 ~ 0x1f ----
    0x10 = 0x0000     0x11 = 0x0000     0x12 = 0x0000     0x13 = 0x0000
    0x14 = 0x0000     0x15 = 0x0000     0x16 = 0x0000     0x17 = 0x0000
    0x18 = 0x0000     0x19 = 0x0000     0x1a = 0x0000     0x1b = 0x0000
    0x1c = 0x0000     0x1d = 0x0000     0x1e = 0x0000     0x1f = 0x8130

---- Block = 0x8160  Offset = 0x10 ~ 0x1f ----
    0x10 = 0x0000     0x11 = 0x0000     0x12 = 0x0000     0x13 = 0x0000
    0x14 = 0x0000     0x15 = 0x0000     0x16 = 0x0000     0x17 = 0x0000
    0x18 = 0x0000     0x19 = 0x0000     0x1a = 0x0000     0x1b = 0x0000
    0x1c = 0x0000     0x1d = 0x0000     0x1e = 0x0000     0x1f = 0x8160

---- Block = 0x81d0  Offset = 0x10 ~ 0x1f ----
    0x10 = 0xa3f0     0x11 = 0x3000     0x12 = 0x1b1b     0x13 = 0x1b1b
    0x14 = 0x0000     0x15 = 0x0000     0x16 = 0x0000     0x17 = 0x0000
    0x18 = 0x0100     0x19 = 0x5812     0x1a = 0x5a12     0x1b = 0x5415
    0x1c = 0x5812     0x1d = 0x0000     0x1e = 0xff03     0x1f = 0x81d0

---- Block = 0x8210  Offset = 0x10 ~ 0x1f ----
    0x10 = 0x014d     0x11 = 0x0000     0x12 = 0x0840     0x13 = 0x0210
    0x14 = 0x5880     0x15 = 0x4130     0x16 = 0x0000     0x17 = 0x0000
    0x18 = 0x0000     0x19 = 0x0000     0x1a = 0x0000     0x1b = 0x0000
    0x1c = 0x7cc0     0x1d = 0x0005     0x1e = 0x2000     0x1f = 0x8210

---- Block = 0x82e0  Offset = 0x10 ~ 0x1f ----
    0x10 = 0x0000     0x11 = 0x0000     0x12 = 0xd6a0     0x13 = 0xbf00
    0x14 = 0x3820     0x15 = 0x5a54     0x16 = 0x03f0     0x17 = 0x035a
    0x18 = 0x03f0     0x19 = 0x7fff     0x1a = 0xffff     0x1b = 0x0000
    0x1c = 0x0001     0x1d = 0x0000     0x1e = 0x0000     0x1f = 0x82e0

---- Block = 0x8300  Offset = 0x10 ~ 0x1f ----
    0x10 = 0x0181     0x11 = 0x0007     0x12 = 0x0002     0x13 = 0x0000
    0x14 = 0x001c     0x15 = 0x0d81     0x16 = 0x0280     0x17 = 0x0000
    0x18 = 0x6005     0x19 = 0x6190     0x1a = 0x0820     0x1b = 0x0000
    0x1c = 0x000a     0x1d = 0x0000     0x1e = 0x0000     0x1f = 0x8300

---- Block = 0x8310  Offset = 0x10 ~ 0x1f ----
    0x10 = 0x0a90     0x11 = 0x1fcc     0x12 = 0xffff     0x13 = 0xff80
    0x14 = 0x17f0     0x15 = 0x0000     0x16 = 0x0000     0x17 = 0x0000
    0x18 = 0x0000     0x19 = 0x0000     0x1a = 0x0000     0x1b = 0x0000
    0x1c = 0x0000     0x1d = 0x0000     0x1e = 0x0000     0x1f = 0x8310

---- Block = 0x8320  Offset = 0x10 ~ 0x1f ----
    0x10 = 0x71b0     0x11 = 0x71b0     0x12 = 0x25a0     0x13 = 0x0b26
    0x14 = 0x8004     0x15 = 0x71b0     0x16 = 0x0b0b     0x17 = 0x0000
    0x18 = 0x0000     0x19 = 0x0000     0x1a = 0x0000     0x1b = 0x0404
    0x1c = 0x0000     0x1d = 0x0000     0x1e = 0x0000     0x1f = 0x8320

---- Block = 0x8340  Offset = 0x10 ~ 0x1f ----
    0x10 = 0x0072     0x11 = 0x70e0     0x12 = 0x0000     0x13 = 0x0400
    0x14 = 0x0000     0x15 = 0x0000     0x16 = 0x0000     0x17 = 0x0000
    0x18 = 0x0000     0x19 = 0x000a     0x1a = 0x000a     0x1b = 0x0000
    0x1c = 0x0000     0x1d = 0x0009     0x1e = 0x1b1b     0x1f = 0x8340

---- Block = 0x8350  Offset = 0x10 ~ 0x1f ----
    0x10 = 0x0000     0x11 = 0x147e     0x12 = 0x3d3d     0x13 = 0x3d3d
    0x14 = 0x0000     0x15 = 0x02bd     0x16 = 0x0601     0x17 = 0x0001
    0x18 = 0x0000     0x19 = 0x0000     0x1a = 0x0000     0x1b = 0x0000
    0x1c = 0x0801     0x1d = 0x0400     0x1e = 0x0400     0x1f = 0x8350

---- Block = 0x83c0  Offset = 0x10 ~ 0x1f ----
    0x10 = 0x7415     0x11 = 0x8000     0x12 = 0xe070     0x13 = 0xc0d0
    0x14 = 0xa0b0     0x15 = 0x8090     0x16 = 0xf0f0     0x17 = 0xf0f0
    0x18 = 0xf0f0     0x19 = 0xf0f0     0x1a = 0x1b4b     0x1b = 0x0401
    0x1c = 0xffff     0x1d = 0x0000     0x1e = 0x0000     0x1f = 0x83c0

---- Block = 0xffc0  Offset = 0x10 ~ 0x1f ----
    0x10 = 0x769f     0x11 = 0x0000     0x12 = 0x0010     0x13 = 0x0000
    0x14 = 0x0000     0x15 = 0x8000     0x16 = 0x0000     0x17 = 0x0000
    0x18 = 0x0000     0x19 = 0x0000     0x1a = 0x000f     0x1b = 0x0000
    0x1c = 0x0004     0x1d = 0xaf19     0x1e = 0x0002     0x1f = 0x0000

---- Block = 0xffd0  Offset = 0x10 ~ 0x1f ----
    0x10 = 0x0000     0x11 = 0x0000     0x12 = 0x0000     0x13 = 0x0000
    0x14 = 0x0000     0x15 = 0x0000     0x16 = 0x0000     0x17 = 0x0000
    0x18 = 0x0000     0x19 = 0x0000     0x1a = 0x0000     0x1b = 0x0000
    0x1c = 0x0000     0x1d = 0x0000     0x1e = 0x0002     0x1f = 0xffd0

---- Block = 0xffe0  Offset = 0x10 ~ 0x1f ----
    0x10 = 0x0100     0x11 = 0x0109     0x12 = 0x0143     0x13 = 0xbff0
    0x14 = 0x00a0     0x15 = 0x0000     0x16 = 0x0004     0x17 = 0x2001
    0x18 = 0x0000     0x19 = 0x0000     0x1a = 0x0000     0x1b = 0x0000
    0x1c = 0x0000     0x1d = 0x0000     0x1e = 0x0000     0x1f = 0xffe0

*************************************************************************
*                   M A C   R E G I S T E R   D U M P                   *
*                                                                       *
*************************************************************************

CLP_XMAC_CTRL = 0x1803
   TX_EN = 1                          RX_EN = 1
   LINE_LOCAL_LPBK = 0                CORE_LOCAL_LPBK = 0
   LINE_REMOTE_LPBK = 0               CORE_REMOTE_LPBK = 0
   SOFT_RESET = 0                     XLGMII_ALIGN_ENB = 0
   LOCAL_LPBK_LEAK_ENB = 0            REMOTE_LPBK_LEAK_ENB = 0
   RS_SOFT_RESET = 0                  XGMII_IPG_CHECK_DISABLE = 1
   SW_LINK_STATUS = 1                 LINK_STATUS_SELECT = 0

CLP_XMAC_MODE = 0x40
   HDR_MODE = 0                       NO_SOP_FOR_CRC_HG 0
   SPEED_MODE = 4

CLP_XMAC_TX_CTRL = 0x300000c813
   CRC_MODE = 3                       DISCARD = 0
   TX_ANY_START = 0                   PAD_EN = 1
   PAD_THRESHOLD = 40                 AVERAGE_IPG = c
   THROT_NUM = 0                      XMAC_TX_CTRL_LO = c813
   THROT_DENOM = 0                    TX_PREAMBLE_LENGTH = 8
   TX_64BYTE_BUFFER_EN = 1            XMAC_TX_CTRL_HI = 30
   AVERAGE_IPG = c

CLP_XMAC_TX_MAC_SA = 0x1974593301
   SA_LO = 74593301
   SA_HI = 19
   CTRL_SA = 1974593301

CLP_XMAC_RX_CTRL = 0x140c
   RX_PASS_CTRL = 0                   RX_ANY_START = 0
   STRIP_CRC = 1                      STRICT_PREAMBLE = 1
   RUNT_THRESHOLD = 40                RECEIVE_18_BYTE_PKTS = 0
   PROCESS_VARIABLE_PREAMBLE = 1

CLP_XMAC_RX_MAC_SA = 0x0
   SA_LO = 0
   SA_HI = 0
   RX_SA = 0

CLP_XMAC_RX_MAX_SIZE = 0x23fc
   RX_MAX_SIZE = 23fc

CLP_XMAC_RX_VLAN_TAG = 0x381008100
   INNER_VLAN_TAG = 8100              OUTER_VLAN_TAG = 8100
   INNER_VLAN_TAG_ENABLE = 1          OUTER_VLAN_TAG_ENABLE = 1

CLP_XMAC_RX_LSS_CTRL = 0x30
   LOCAL_FAULT_DISABLE = 0            REMOTE_FAULT_DISABLE = 0
   USE_EXTERNAL_FAULTS_FOR_TX = 0     LINK_INTERRUPTION_DISABLE = 0
   DROP_TX_DATA_ON_LOCAL_FAULT = 1    DROP_TX_DATA_ON_REMOTE_FAULT = 1
   DROP_TX_DATA_ON_LINK_INTERRUPT = 0
   RESET_FLOW_CONTROL_TIMERS_ON_LINK_DOWN = 0

CLP_XMAC_RX_LSS_STATUS = 0x1
   LOCAL_FAULT_STATUS = 1             REMOTE_FAULT_STATUS = 0
   LINK_INTERRUPTION_STATUS = 0

CLP_XMAC_PAUSE_CTRL = 0x1ffff1c000
   PAUSE_REFRESH_TIMER = c000         PAUSE_REFRESH_EN = 1
   TX_PAUSE_EN = 0                    RX_PAUSE_EN = 0
   RX_PASS_PAUSE = 0                  PAUSE_GMII_ON_TX_LINE_SIDE = 1
   PAUSE_XOFF_TIMER = 7ff             XMAC_PAUSE_CTRL_LO = fff1c000
   XMAC_PAUSE_CTRL_HI = 1f

CLP_XMAC_PFC_CTRL = 0x8ffffc000
   PFC_REFRESH_TIMER = c000           PFC_XOFF_TIMER = 1
   PFC_REFRESH_EN = 0                 FORCE_PFC_XON = 0
   RX_PASS_PFC = 0                    PFC_STATS_EN = 1
   RX_PFC_EN = 0                      TX_PFC_EN = 0

CLP_XMAC_PFC_TYPE = 0x8808
   PFC_ETH_TYPE = 8808

CLP_XMAC_PFC_OPCODE = 0x101
   PFC_OPCODE = 101

CLP_XMAC_PFC_DA = 0x180c2000001

CLP_XMAC_TX_TIMESTAMP_FIFO_DATA = 0x0

CLP_XMAC_TX_TIMESTAMP_FIFO_STATUS = 0x0
   ENTRY_COUNT = 0

CLP_XMAC_FIFO_STATUS = 0x80
   RX_PKT_OVERFLOW = 0                RX_MSG_OVERFLOW = 0
   TX_PKT_UNDERFLOW = 0               TX_PKT_OVERFLOW = 0
   TX_HCFC_MSG_OVERFLOW = 0           TX_LLFC_MSG_OVERFLOW = 0
   TX_TS_FIFO_OVERFLOW = 0            LINK_STATUS = 1

CLP_XMAC_EEE_CTRL = 0x0
   EEE_EN = 0

CLP_XMAC_EEE_TIMERS = 0x138000000000000
   EEE_DELAY_ENTRY_TIMER = 0          EEE_WAKE_TIMER = 0
   EEE_REF_COUNT = 10

PORT_ENABLE_REG.CLP1 = 0xfff
 PORT_11=1   ,PORT_10=1   ,PORT_
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更新时间:2019-08-09

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